The Optimisation of Large Scale Logical Circuits

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F19%3APU131930" target="_blank" >RIV/00216305:26220/19:PU131930 - isvavai.cz</a>

Výsledek na webu

<a href="http://www.feec.vutbr.cz/conf/EEICT/archiv/sborniky/EEICT_2019_sbornik.pdf" target="_blank" >http://www.feec.vutbr.cz/conf/EEICT/archiv/sborniky/EEICT_2019_sbornik.pdf</a>

DOI - Digital Object Identifier

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Jazyk výsledku

angličtina

Název v původním jazyce

The Optimisation of Large Scale Logical Circuits

Popis výsledku v původním jazyce

In the phase of designing the logical circuits, it is essential to minimise the number of elements because it leads to the more reliable, more secure, and cheaper solution. For the logical functions with less than 4 variables, the Karnaugh maps are suitable. However, in practice, we encounter usually a much more complex function, in those cases, we could apply Boolean algebra laws directly or use the Quine-McCluskey method, which is based on their systematic use. Unfortunately, this method does not usually provide a minimal form of logical function for really large scale logical functions, and in a result may be redundant expressions. For that reason, we show that we could apply an additional phase which leads to the set covering problem which needs to cover all the inputs by the obtained outputs. Since this problem is NP-hard, it is necessary to use heuristic methods, such as simulated annealing.

Název v anglickém jazyce

The Optimisation of Large Scale Logical Circuits

Popis výsledku anglicky

In the phase of designing the logical circuits, it is essential to minimise the number of elements because it leads to the more reliable, more secure, and cheaper solution. For the logical functions with less than 4 variables, the Karnaugh maps are suitable. However, in practice, we encounter usually a much more complex function, in those cases, we could apply Boolean algebra laws directly or use the Quine-McCluskey method, which is based on their systematic use. Unfortunately, this method does not usually provide a minimal form of logical function for really large scale logical functions, and in a result may be redundant expressions. For that reason, we show that we could apply an additional phase which leads to the set covering problem which needs to cover all the inputs by the obtained outputs. Since this problem is NP-hard, it is necessary to use heuristic methods, such as simulated annealing.

Druh

D - Stať ve sborníku

CEP obor

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OECD FORD obor

20206 - Computer hardware and architecture

Projekt

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Návaznosti

S - Specificky vyzkum na vysokych skolach

Rok uplatnění

2019

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

Proceedings of the 25th Conference STUDENT EEICT 2019

ISBN

978-80-214-5735-5

ISSN

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e-ISSN

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Počet stran výsledku

5

Strana od-do

469-473

Název nakladatele

Neuveden

Místo vydání

Brno

Místo konání akce

Brno

Datum konání akce

27. 4. 2017

Typ akce podle státní příslušnosti

CST - Celostátní akce

Kód UT WoS článku

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