Design and Analysis of Floating Inductance Simulators using VDDDAs and Their Applications

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F19%3APU133517" target="_blank" >RIV/00216305:26220/19:PU133517 - isvavai.cz</a>

Nalezeny alternativní kódy

RIV/68407700:21460/19:00340703

Výsledek na webu

<a href="https://doi.org/10.1016/j.aeue.2019.152937" target="_blank" >https://doi.org/10.1016/j.aeue.2019.152937</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1016/j.aeue.2019.152937" target="_blank" >10.1016/j.aeue.2019.152937</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Design and Analysis of Floating Inductance Simulators using VDDDAs and Their Applications

Popis výsledku v původním jazyce

This contribution introduces the design of new electronically controllable floating inductance simulators including lossless inductor, parallel resistor-inductor and series resistor-inductor circuits. The proposed simulators consist of two voltage differencing differential difference amplifiers (VDDDAs) as active function block with one resistor and one grounded capacitor. For real practical test and cheap cost, the VDDDA employed in this paper is constructed from commercially available ICs. The proposed active inductors don’t require any critical matching condition of passive element. If second port of the proposed inductors is assigned as output voltage, it can be simply adapted to achieve low impedance output voltage node with unity or double gain amplifier which is beneficial feature. Moreover, the third order low-pass and fourth order band-pass ladder filters are designed using proposed simulators. Low impedance output voltage node and double output voltage gain of ladder filters with electronic controllability of pass-band frequency are obtained. The performances of the presented simulator circuits and ladder filters are tested by Pspice simulation and experiment using VDDDA constructed from ICs, AD830 and LM13700. The simulation and experimental results confirm with theoretical behavior. Moreover, the recommended design for chip implementation to reduce number of VDDDA is included. The recommended lossless inductor, parallel resistor-inductor and series resistor-inductor circuits consist of single VDDDA which contains plus and minus z terminals along with single resistor and single grounded capacitor.

Název v anglickém jazyce

Design and Analysis of Floating Inductance Simulators using VDDDAs and Their Applications

Popis výsledku anglicky

This contribution introduces the design of new electronically controllable floating inductance simulators including lossless inductor, parallel resistor-inductor and series resistor-inductor circuits. The proposed simulators consist of two voltage differencing differential difference amplifiers (VDDDAs) as active function block with one resistor and one grounded capacitor. For real practical test and cheap cost, the VDDDA employed in this paper is constructed from commercially available ICs. The proposed active inductors don’t require any critical matching condition of passive element. If second port of the proposed inductors is assigned as output voltage, it can be simply adapted to achieve low impedance output voltage node with unity or double gain amplifier which is beneficial feature. Moreover, the third order low-pass and fourth order band-pass ladder filters are designed using proposed simulators. Low impedance output voltage node and double output voltage gain of ladder filters with electronic controllability of pass-band frequency are obtained. The performances of the presented simulator circuits and ladder filters are tested by Pspice simulation and experiment using VDDDA constructed from ICs, AD830 and LM13700. The simulation and experimental results confirm with theoretical behavior. Moreover, the recommended design for chip implementation to reduce number of VDDDA is included. The recommended lossless inductor, parallel resistor-inductor and series resistor-inductor circuits consist of single VDDDA which contains plus and minus z terminals along with single resistor and single grounded capacitor.

Druh

J_imp - Článek v periodiku v databázi Web of Science

CEP obor

—

OECD FORD obor

20201 - Electrical and electronic engineering

Projekt

Výsledek vznikl pri realizaci vícero projektů. Více informací v záložce Projekty.

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2019

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

AEU - International Journal of Electronics and Communications

ISSN

1434-8411

e-ISSN

1618-0399

Svazek periodika

112

Číslo periodika v rámci svazku

12/2019

Stát vydavatele periodika

DE - Spolková republika Německo

Počet stran výsledku

12

Strana od-do

1-12

Kód UT WoS článku

000498324200003

EID výsledku v databázi Scopus

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