Wide-tunable LC-VCO design with a novel active inductor

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F22%3APU144730" target="_blank" >RIV/00216305:26220/22:PU144730 - isvavai.cz</a>

Výsledek na webu

<a href="https://www.sciencedirect.com/science/article/pii/S1434841122001601" target="_blank" >https://www.sciencedirect.com/science/article/pii/S1434841122001601</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1016/j.aeue.2022.154266" target="_blank" >10.1016/j.aeue.2022.154266</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Wide-tunable LC-VCO design with a novel active inductor

Popis výsledku v původním jazyce

This paper presents the design of a wide-tunable, low-voltage, small-area LC voltage-controlled oscillator (LC-VCO). Instead of a spiral inductor, a novel active inductor is used in the conventional bottom-biased NMOS cross-coupled LC-VCO architecture. The oscillator, designed in TSMC 65 nm CMOS process and post-layout simulated in Cadence Design Suite, operates at a frequency range of 2.4 to 3.8 GHz and draws 8.5 mA from a 1.2 V supply. At a 1 MHz offset, the circuit has a phase noise of −80.22 dBc/Hz. The designed circuit has a differential output swing of 56.1 mV, and the percentage of total harmonic distortion (THD) is determined as 3.47% in the nominal case. The designed LC-VCO consumes only 0.013 mm silicon area. Additionally, a buffer circuit is presented that can be utilized to make the oscillation rail-to-rail.

Název v anglickém jazyce

Wide-tunable LC-VCO design with a novel active inductor

Popis výsledku anglicky

This paper presents the design of a wide-tunable, low-voltage, small-area LC voltage-controlled oscillator (LC-VCO). Instead of a spiral inductor, a novel active inductor is used in the conventional bottom-biased NMOS cross-coupled LC-VCO architecture. The oscillator, designed in TSMC 65 nm CMOS process and post-layout simulated in Cadence Design Suite, operates at a frequency range of 2.4 to 3.8 GHz and draws 8.5 mA from a 1.2 V supply. At a 1 MHz offset, the circuit has a phase noise of −80.22 dBc/Hz. The designed circuit has a differential output swing of 56.1 mV, and the percentage of total harmonic distortion (THD) is determined as 3.47% in the nominal case. The designed LC-VCO consumes only 0.013 mm silicon area. Additionally, a buffer circuit is presented that can be utilized to make the oscillation rail-to-rail.

Druh

J_imp - Článek v periodiku v databázi Web of Science

CEP obor

—

OECD FORD obor

20201 - Electrical and electronic engineering

Projekt

—

Návaznosti

S - Specificky vyzkum na vysokych skolach

Rok uplatnění

2022

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

AEU - International Journal of Electronics and Communications

ISSN

1434-8411

e-ISSN

1618-0399

Svazek periodika

153

Číslo periodika v rámci svazku

8

Stát vydavatele periodika

DE - Spolková republika Německo

Počet stran výsledku

9

Strana od-do

1-9

Kód UT WoS článku

000815864600005

EID výsledku v databázi Scopus

2-s2.0-85131950452