FPGA Digital Circuit for up to 400 Gbps Transfers over Ethernet

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F22%3APU150912" target="_blank" >RIV/00216305:26220/22:PU150912 - isvavai.cz</a>

Výsledek na webu

<a href="https://www.eeict.cz/eeict_download/archiv/sborniky/EEICT_2022_sbornik_1_v2.pdf" target="_blank" >https://www.eeict.cz/eeict_download/archiv/sborniky/EEICT_2022_sbornik_1_v2.pdf</a>

DOI - Digital Object Identifier

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Jazyk výsledku

angličtina

Název v původním jazyce

FPGA Digital Circuit for up to 400 Gbps Transfers over Ethernet

Popis výsledku v původním jazyce

Network cards with a hardware acceleration feature are a popular solution for meeting the ever-increasing demands for throughput in high-speed networks. Utilizing the FPGA (Field Programmable Gate Array) chips as the hardware acceleration elements, this paper presents a generic and highly modular digital circuit for FPGA that manages the transfer of data in form of Ethernet frames at rates reaching up to 400 Gbps. To achieve this, the proposed digital circuit takes advantage of the Ethernet intellectual property (IP) blocks in high-end FPGAs from Intel. By first implementing and fine-tuning it for data rates up to 100 Gbps, the next step is expanding it to reach data rates up to 400 Gbps. The created digital circuit will then be used in the FPGA design for the XpressSX AGI-FH400G network card (among others) created by companies CESNET a.l.e and REFLEX CES. Even though the target data rate is 400 Gbps, this paper focuses on the first step, which is the utilization of the Intel Ethernet hard IP blocks to reach 100 Gbps.

Název v anglickém jazyce

FPGA Digital Circuit for up to 400 Gbps Transfers over Ethernet

Popis výsledku anglicky

Network cards with a hardware acceleration feature are a popular solution for meeting the ever-increasing demands for throughput in high-speed networks. Utilizing the FPGA (Field Programmable Gate Array) chips as the hardware acceleration elements, this paper presents a generic and highly modular digital circuit for FPGA that manages the transfer of data in form of Ethernet frames at rates reaching up to 400 Gbps. To achieve this, the proposed digital circuit takes advantage of the Ethernet intellectual property (IP) blocks in high-end FPGAs from Intel. By first implementing and fine-tuning it for data rates up to 100 Gbps, the next step is expanding it to reach data rates up to 400 Gbps. The created digital circuit will then be used in the FPGA design for the XpressSX AGI-FH400G network card (among others) created by companies CESNET a.l.e and REFLEX CES. Even though the target data rate is 400 Gbps, this paper focuses on the first step, which is the utilization of the Intel Ethernet hard IP blocks to reach 100 Gbps.

Druh

D - Stať ve sborníku

CEP obor

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OECD FORD obor

20200 - Electrical engineering, Electronic engineering, Information engineering

Projekt

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Návaznosti

I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Rok uplatnění

2022

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

Proceedings I of the 28th Conference STUDENT EEICT 2022

ISBN

978-80-214-6029-4

ISSN

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e-ISSN

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Počet stran výsledku

4

Strana od-do

303-306

Název nakladatele

Brno University of Technology, Faculty of Electrical Engineering and Communication

Místo vydání

Brno

Místo konání akce

Brno

Datum konání akce

26. 4. 2022

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

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