Taylor Series Numerical Integrator

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F08%3APU76790" target="_blank" >RIV/00216305:26230/08:PU76790 - isvavai.cz</a>

Výsledek na webu

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DOI - Digital Object Identifier

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Jazyk výsledku

angličtina

Název v původním jazyce

Taylor Series Numerical Integrator

Popis výsledku v původním jazyce

The simulation language TKSL and Modern Taylor Series Method have proved to be very powerful computing tools for extremely exact, stable and fast numerical solutions of systems of differential equations. In a natural way, TKSL also involves solutions ofproblems that can be converted to solving a system of differential equations. As an example, a solution of a set of simultaneous algebraic equations by system of differential equations is dealt with in the paper. The solution of a set of algebraic equations by differential equations represents a parallel computation when special units so called integrators are used. All the integrators are working in parallel, e.g. all integrators are controlled by the same algorithm of a numerical integration method. That is why, a parallel interpretation of integrators in a suitable hardware can be expected. We outline the design and implementation of an FPGAbased numerical integrator that will form the basis of our<br>FPGA-based parallel hardware. A

Název v anglickém jazyce

Taylor Series Numerical Integrator

Popis výsledku anglicky

The simulation language TKSL and Modern Taylor Series Method have proved to be very powerful computing tools for extremely exact, stable and fast numerical solutions of systems of differential equations. In a natural way, TKSL also involves solutions ofproblems that can be converted to solving a system of differential equations. As an example, a solution of a set of simultaneous algebraic equations by system of differential equations is dealt with in the paper. The solution of a set of algebraic equations by differential equations represents a parallel computation when special units so called integrators are used. All the integrators are working in parallel, e.g. all integrators are controlled by the same algorithm of a numerical integration method. That is why, a parallel interpretation of integrators in a suitable hardware can be expected. We outline the design and implementation of an FPGAbased numerical integrator that will form the basis of our<br>FPGA-based parallel hardware. A

Druh

D - Stať ve sborníku

CEP obor

JC - Počítačový hardware a software

OECD FORD obor

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Projekt

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Návaznosti

Z - Vyzkumny zamer (s odkazem do CEZ)

Rok uplatnění

2008

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

Second UKSIM European Symposium on Computer Modeling and Simulation

ISBN

978-0-7695-3325-4

ISSN

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e-ISSN

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Počet stran výsledku

4

Strana od-do

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Název nakladatele

IEEE Computer Society

Místo vydání

Liverpool

Místo konání akce

Liverpool

Datum konání akce

8. 9. 2008

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

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