Fast Cycle-Accurate Compiled Simulator

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F10%3APU89649" target="_blank" >RIV/00216305:26230/10:PU89649 - isvavai.cz</a>

Výsledek na webu

—

DOI - Digital Object Identifier

—

Jazyk výsledku

angličtina

Název v původním jazyce

Fast Cycle-Accurate Compiled Simulator

Popis výsledku v původním jazyce

The embedded systems with application specific instruction set processors, on which specific software runs, has become an inseparable part of our everyday life. Therefore, powerful tools for their development are necessary. Each tool is used in differentphases of an embedded system design. One of the key phases is the testing of processor and software functionality. The most used approach in industry is simulation. A simulation can verify that the processor design and software does not contain bugs andthat both parts are optimal enough before embedded system realization. The key factor of simulation is its accuracy and speed. In this article a concept of our cycle-accurate compiled simulation is described. The simulator uses such principles which guarantee independence on a host platform, including very good performance and precision. Furthermore, it can simulate a self-modifying code and systems with external memories.

Název v anglickém jazyce

Fast Cycle-Accurate Compiled Simulator

Popis výsledku anglicky

The embedded systems with application specific instruction set processors, on which specific software runs, has become an inseparable part of our everyday life. Therefore, powerful tools for their development are necessary. Each tool is used in differentphases of an embedded system design. One of the key phases is the testing of processor and software functionality. The most used approach in industry is simulation. A simulation can verify that the processor design and software does not contain bugs andthat both parts are optimal enough before embedded system realization. The key factor of simulation is its accuracy and speed. In this article a concept of our cycle-accurate compiled simulation is described. The simulator uses such principles which guarantee independence on a host platform, including very good performance and precision. Furthermore, it can simulate a self-modifying code and systems with external memories.

Druh

D - Stať ve sborníku

CEP obor

JC - Počítačový hardware a software

OECD FORD obor

—

Projekt

Výsledek vznikl pri realizaci vícero projektů. Více informací v záložce Projekty.

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2010

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

10th IFAC Workshop on Programmable Devices and Embedded Systems, PDeS 2010

ISBN

978-3-902661-95-1

ISSN

—

e-ISSN

—

Počet stran výsledku

6

Strana od-do

97-102

Název nakladatele

IFAC

Místo vydání

Pszczyna

Místo konání akce

Pszczyna

Datum konání akce

5. 10. 2010

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

—