Control Flow Analysis for Bottom-up Portable Models Creation

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F23%3APU151191" target="_blank" >RIV/00216305:26230/23:PU151191 - isvavai.cz</a>

Výsledek na webu

<a href="https://www.fit.vut.cz/research/publication/13024/" target="_blank" >https://www.fit.vut.cz/research/publication/13024/</a>

DOI - Digital Object Identifier

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Jazyk výsledku

angličtina

Název v původním jazyce

Control Flow Analysis for Bottom-up Portable Models Creation

Popis výsledku v původním jazyce

Portable Test and Stimulus Standard (PSS) is a game-changing standard in the simulation-based verification. This paper focuses on creating a top-level PSS model of the design under verification (DUV) using PSS models of its components (submodels). This is one of the most challenging problems the PSS is currently facing, and it is called vertical reuse of portable models. The hardest part is to create proper constraints for the interconnection of submodels to represent behaviour intended to be verified. This paper aims to evaluate a hypothesis that with the analysis of the control flow inside the DUV, we can significantly simplify the reusability of PSS models in the vertical direction. We believe that the control flow analysis will provide valuable information for creating constraints, as the control signals influence the DUV's behaviour the most. As the DUV, we selected the execution stage subsystem of the PULP platform processor. Firstly, we have created PSS models for all components ins

Název v anglickém jazyce

Control Flow Analysis for Bottom-up Portable Models Creation

Popis výsledku anglicky

Portable Test and Stimulus Standard (PSS) is a game-changing standard in the simulation-based verification. This paper focuses on creating a top-level PSS model of the design under verification (DUV) using PSS models of its components (submodels). This is one of the most challenging problems the PSS is currently facing, and it is called vertical reuse of portable models. The hardest part is to create proper constraints for the interconnection of submodels to represent behaviour intended to be verified. This paper aims to evaluate a hypothesis that with the analysis of the control flow inside the DUV, we can significantly simplify the reusability of PSS models in the vertical direction. We believe that the control flow analysis will provide valuable information for creating constraints, as the control signals influence the DUV's behaviour the most. As the DUV, we selected the execution stage subsystem of the PULP platform processor. Firstly, we have created PSS models for all components ins

Druh

O - Ostatní výsledky

CEP obor

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OECD FORD obor

20206 - Computer hardware and architecture

Projekt

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Návaznosti

S - Specificky vyzkum na vysokych skolach

Rok uplatnění

2023

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů