Reliable digital dead-time generatorfor the GaN HEMTs based H-bridge converters

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F49777513%3A23220%2F20%3A43960205" target="_blank" >RIV/49777513:23220/20:43960205 - isvavai.cz</a>

Výsledek na webu

<a href="http://journals.pan.pl/dlibra/publication/134629/edition/117662/content" target="_blank" >http://journals.pan.pl/dlibra/publication/134629/edition/117662/content</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.24425/aee.2020.134629" target="_blank" >10.24425/aee.2020.134629</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Reliable digital dead-time generatorfor the GaN HEMTs based H-bridge converters

Popis výsledku v původním jazyce

The paper deals with hardware solution of a fully digital dead-time generator. The circuit is applicable to the H-bridges based on any type of semiconductor switching devices including SiC, IGBT, Si-MOSFET and up-to-date GaN HEMTs. The generation of dead-times is ensured by commercially available silicon delay lines. High temperature stability is obtained by self-compensation of propagation delay of logic elements thanks to the symmetry of design topology. The circuit can be set-up to generate dead-times in the range from 10 ns to 500 ns. Longer dead-times are also available by simple cascading of the silicon delay lines. The key motivation for development of the circuit was unavailability of ready to use integrated solutions on the market. Moreover, contrary to the other solutions the proposed circuit is immune to prospective oscillations of an input PWM signal. The paper brings a detailed analysis of the circuit principle, results of the verification of a sample solution and an example of practical application as well. © 2020. The Author(s). This is an open-access article distributed under the terms of the Creative Commons Attribution-NonCommercial-NoDerivatives License (CC BY-NC-ND 4.0, https://creativecommons.org/licenses/by-nc-nd/4.0/), which permits use, distribution, and reproduction in any medium, provided that the Article is properly cited, the use is non-commercial, and no modifications or adaptations are made.

Název v anglickém jazyce

Reliable digital dead-time generatorfor the GaN HEMTs based H-bridge converters

Popis výsledku anglicky

The paper deals with hardware solution of a fully digital dead-time generator. The circuit is applicable to the H-bridges based on any type of semiconductor switching devices including SiC, IGBT, Si-MOSFET and up-to-date GaN HEMTs. The generation of dead-times is ensured by commercially available silicon delay lines. High temperature stability is obtained by self-compensation of propagation delay of logic elements thanks to the symmetry of design topology. The circuit can be set-up to generate dead-times in the range from 10 ns to 500 ns. Longer dead-times are also available by simple cascading of the silicon delay lines. The key motivation for development of the circuit was unavailability of ready to use integrated solutions on the market. Moreover, contrary to the other solutions the proposed circuit is immune to prospective oscillations of an input PWM signal. The paper brings a detailed analysis of the circuit principle, results of the verification of a sample solution and an example of practical application as well. © 2020. The Author(s). This is an open-access article distributed under the terms of the Creative Commons Attribution-NonCommercial-NoDerivatives License (CC BY-NC-ND 4.0, https://creativecommons.org/licenses/by-nc-nd/4.0/), which permits use, distribution, and reproduction in any medium, provided that the Article is properly cited, the use is non-commercial, and no modifications or adaptations are made.

Druh

J_imp - Článek v periodiku v databázi Web of Science

CEP obor

—

OECD FORD obor

20201 - Electrical and electronic engineering

Projekt

<a href="/cs/project/LO1607" target="_blank" >LO1607: RICE – Nové technologie a koncepce pro inteligentní průmyslové systémy</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2020

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

Archives of Electrical Engineering

ISSN

1427-4221

e-ISSN

—

Svazek periodika

69

Číslo periodika v rámci svazku

4

Stát vydavatele periodika

PL - Polská republika

Počet stran výsledku

12

Strana od-do

781-792

Kód UT WoS článku

000589684200003

EID výsledku v databázi Scopus

2-s2.0-85097182066