The hardware platform for the tests and evaluation of the airborne GNSS receiver algorithms
Identifikátory výsledku
Kód výsledku v IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F60162694%3AG43__%2F12%3A00480507" target="_blank" >RIV/60162694:G43__/12:00480507 - isvavai.cz</a>
Výsledek na webu
<a href="http://vavtest.unob.cz/registr" target="_blank" >http://vavtest.unob.cz/registr</a>
DOI - Digital Object Identifier
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Alternativní jazyky
Jazyk výsledku
angličtina
Název v původním jazyce
The hardware platform for the tests and evaluation of the airborne GNSS receiver algorithms
Popis výsledku v původním jazyce
The main aim of this paper is to show a concept of the hardware platform for evaluation of the GNSS receiver algorithms. There was a request for good flexibility of the system for designing elements of multiple GNSS receivers. Designed system is suitablefor receiving a signal at chosen frequency from the operating range (915 to 2175 MHz) and its next processing. Front-end device receives the signal and does a QPSK demodulation. Platform is based on the FPGA, so the module structure of the implemented system allows good dealing with designed entities. Suitable is the possibility of simply designing and implementing the digital filters in this platform. Although used RF frontend MAX2120 is not directly intended for GPS signal receiving or processing, with its number of parameters it is convenient to utilize in this issue. Paper describes how the MAX2120 is tuned through I2C bus by I2C Master device implemented in used FPGA. For demonstration, there was implemented and tested the system
Název v anglickém jazyce
The hardware platform for the tests and evaluation of the airborne GNSS receiver algorithms
Popis výsledku anglicky
The main aim of this paper is to show a concept of the hardware platform for evaluation of the GNSS receiver algorithms. There was a request for good flexibility of the system for designing elements of multiple GNSS receivers. Designed system is suitablefor receiving a signal at chosen frequency from the operating range (915 to 2175 MHz) and its next processing. Front-end device receives the signal and does a QPSK demodulation. Platform is based on the FPGA, so the module structure of the implemented system allows good dealing with designed entities. Suitable is the possibility of simply designing and implementing the digital filters in this platform. Although used RF frontend MAX2120 is not directly intended for GPS signal receiving or processing, with its number of parameters it is convenient to utilize in this issue. Paper describes how the MAX2120 is tuned through I2C bus by I2C Master device implemented in used FPGA. For demonstration, there was implemented and tested the system
Klasifikace
Druh
D - Stať ve sborníku
CEP obor
KA - Vojenství
OECD FORD obor
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Návaznosti výsledku
Projekt
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Návaznosti
S - Specificky vyzkum na vysokych skolach
Ostatní
Rok uplatnění
2012
Kód důvěrnosti údajů
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Údaje specifické pro druh výsledku
Název statě ve sborníku
31st Digital Avionics Systems Conference
ISBN
978-1-4673-1698-9
ISSN
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e-ISSN
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Počet stran výsledku
7
Strana od-do
1-7
Název nakladatele
ALR International
Místo vydání
Orlando, FL, USA
Místo konání akce
Wiliamsburg, Virginia, USA
Datum konání akce
1. 1. 2012
Typ akce podle státní příslušnosti
WRD - Celosvětová akce
Kód UT WoS článku
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