Image Processing of Composite Video with FPGA Programmable Logic

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F61989100%3A27240%2F16%3A86100209" target="_blank" >RIV/61989100:27240/16:86100209 - isvavai.cz</a>

Výsledek na webu

<a href="http://www.sciencedirect.com/science/article/pii/S2405896316327161/pdf?md5=02d7b6eb1e0548889ad03b2915d9e111&pid=1-s2.0-S2405896316327161-main.pdf" target="_blank" >http://www.sciencedirect.com/science/article/pii/S2405896316327161/pdf?md5=02d7b6eb1e0548889ad03b2915d9e111&pid=1-s2.0-S2405896316327161-main.pdf</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1016/j.ifacol.2016.12.078" target="_blank" >10.1016/j.ifacol.2016.12.078</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Image Processing of Composite Video with FPGA Programmable Logic

Popis výsledku v původním jazyce

Described project presents a hardware solution of Image Processing Unit based on a Spartan-6 FPGA programmable logic. The unit consists of a digitizing videoconverter module, NEXYS 3 board with FPGA (Digilent, 2013) and a color TFT touch screen display (Digilent, 2011). As the video source for the videoconverter serves a composite video output from the Canon MV530i camcorder (Canon-europe, 2002). The output of the video converter is in parallel ITU-BT.656 data format. The video processing unit implements several functions which include conversion to RGB colors, Grayscale, Black and White, Sepia and Edge Detector. The complete FPGA logic is designed in VHDL and many modules are in the form of parameterized IP cores. The resulting video is demonstrated on the TFT display, which also serves for controlling the implemented functions. The project was created for educational purposes as demonstration of video signal processing on FPGA. (C) 2016

Název v anglickém jazyce

Image Processing of Composite Video with FPGA Programmable Logic

Popis výsledku anglicky

Described project presents a hardware solution of Image Processing Unit based on a Spartan-6 FPGA programmable logic. The unit consists of a digitizing videoconverter module, NEXYS 3 board with FPGA (Digilent, 2013) and a color TFT touch screen display (Digilent, 2011). As the video source for the videoconverter serves a composite video output from the Canon MV530i camcorder (Canon-europe, 2002). The output of the video converter is in parallel ITU-BT.656 data format. The video processing unit implements several functions which include conversion to RGB colors, Grayscale, Black and White, Sepia and Edge Detector. The complete FPGA logic is designed in VHDL and many modules are in the form of parameterized IP cores. The resulting video is demonstrated on the TFT display, which also serves for controlling the implemented functions. The project was created for educational purposes as demonstration of video signal processing on FPGA. (C) 2016

Druh

J_x - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)

CEP obor

JA - Elektronika a optoelektronika, elektrotechnika

OECD FORD obor

—

Projekt

—

Návaznosti

S - Specificky vyzkum na vysokych skolach

Rok uplatnění

2016

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

IFAC-PapersOnLine. Volume 48, Issue 4

ISSN

2405-8963

e-ISSN

—

Svazek periodika

49

Číslo periodika v rámci svazku

25

Stát vydavatele periodika

GB - Spojené království Velké Británie a Severního Irska

Počet stran výsledku

5

Strana od-do

482-486

Kód UT WoS článku

—

EID výsledku v databázi Scopus

2-s2.0-85007012695