Wire-Speed Packet Capture and Replay at 200 Gbps

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F63839172%3A_____%2F18%3A10133028" target="_blank" >RIV/63839172:_____/18:10133028 - isvavai.cz</a>

Výsledek na webu

<a href="http://conferences.sigcomm.org/sigcomm/2018/files/indus-demos-final-versions/final-wirespeed-kekely-demo.pdf" target="_blank" >http://conferences.sigcomm.org/sigcomm/2018/files/indus-demos-final-versions/final-wirespeed-kekely-demo.pdf</a>

DOI - Digital Object Identifier

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Jazyk výsledku

angličtina

Název v původním jazyce

Wire-Speed Packet Capture and Replay at 200 Gbps

Popis výsledku v původním jazyce

CESNET (Czech NREN) and Netcope Technologies are ready to demonstrate their NFB-200G2QL smart NIC with Virtex UltraScale+ FPGA specifically designed to push the achievable traffic processing throughput to 200 Gbps in a single card. Unique high-speed DMA engines in the FPGA together with highly optimized Linux drivers enable to achieve 200 Gbps data transfer through two PCIe Gen3 x16 interfaces with minimal CPU overhead. Captured network traffic can be independently distributed among individual cores of two physical CPUs (NUMA nodes) without utilization of QPI. As a result, wire-speed packet capture to the host memory from two fully saturated 100 Gbps Ethernet interfaces (QSFP28+) is achieved and various network monitoring applications can utilize the power of the latest FPGAs and CPUs for data processing. This is especially useful when traffic of both directions of a single 100GbE link needs to be processed. The proposed demonstration shows how the packets can be received from two 100 Gbps Ethernet links at full speed and captured to the host memory at 200 Gbps without any loss. The opposite direction of communication is also shown, i.e. how the packets can be transmitted from the host memory towards the two 100GbE network interfaces. Achieved speeds are demonstrated by counters and gauges showing generated, received/transmitted and captured packets. We also show detailed statistics of CPU load during the packet capture/replay for different packet lengths.

Název v anglickém jazyce

Wire-Speed Packet Capture and Replay at 200 Gbps

Popis výsledku anglicky

CESNET (Czech NREN) and Netcope Technologies are ready to demonstrate their NFB-200G2QL smart NIC with Virtex UltraScale+ FPGA specifically designed to push the achievable traffic processing throughput to 200 Gbps in a single card. Unique high-speed DMA engines in the FPGA together with highly optimized Linux drivers enable to achieve 200 Gbps data transfer through two PCIe Gen3 x16 interfaces with minimal CPU overhead. Captured network traffic can be independently distributed among individual cores of two physical CPUs (NUMA nodes) without utilization of QPI. As a result, wire-speed packet capture to the host memory from two fully saturated 100 Gbps Ethernet interfaces (QSFP28+) is achieved and various network monitoring applications can utilize the power of the latest FPGAs and CPUs for data processing. This is especially useful when traffic of both directions of a single 100GbE link needs to be processed. The proposed demonstration shows how the packets can be received from two 100 Gbps Ethernet links at full speed and captured to the host memory at 200 Gbps without any loss. The opposite direction of communication is also shown, i.e. how the packets can be transmitted from the host memory towards the two 100GbE network interfaces. Achieved speeds are demonstrated by counters and gauges showing generated, received/transmitted and captured packets. We also show detailed statistics of CPU load during the packet capture/replay for different packet lengths.

Druh

O - Ostatní výsledky

CEP obor

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OECD FORD obor

10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)

Projekt

Výsledek vznikl pri realizaci vícero projektů. Více informací v záložce Projekty.

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2018

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů