ALMARVI Execution Platform: Heterogeneous Video Processing SoC Platform on FPGA
Identifikátory výsledku
Kód výsledku v IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F67985556%3A_____%2F19%3A00499963" target="_blank" >RIV/67985556:_____/19:00499963 - isvavai.cz</a>
Výsledek na webu
<a href="https://link.springer.com/article/10.1007%2Fs11265-018-1424-1" target="_blank" >https://link.springer.com/article/10.1007%2Fs11265-018-1424-1</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1007/s11265-018-1424-1" target="_blank" >10.1007/s11265-018-1424-1</a>
Alternativní jazyky
Jazyk výsledku
angličtina
Název v původním jazyce
ALMARVI Execution Platform: Heterogeneous Video Processing SoC Platform on FPGA
Popis výsledku v původním jazyce
The proliferation of processing hardware alternatives allows developers to use various customized computing platforms to run their applications in an optimal way. However, porting application code on custom hardware requires a lot of development and porting effort. This paper describes a heterogeneous computational platform (the ALMARVI execution platform) comprising of multiple communicating processors that allow easy programmability through an interface to OpenCL. The ALMARVI platform uses processing elements based on both VLIW and Transport Triggered Architectures (ρ-VEX and TCE cores, respectively). It can be implemented on Zynq devices such as the ZedBoard, and supports OpenCL by means of the pocl (Portable OpenCL) project and our ALMAIF interface specification. This allows developers to execute kernels transparently on either processing elements, thereby allowing to optimize execution time with minimal design and development effort.
Název v anglickém jazyce
ALMARVI Execution Platform: Heterogeneous Video Processing SoC Platform on FPGA
Popis výsledku anglicky
The proliferation of processing hardware alternatives allows developers to use various customized computing platforms to run their applications in an optimal way. However, porting application code on custom hardware requires a lot of development and porting effort. This paper describes a heterogeneous computational platform (the ALMARVI execution platform) comprising of multiple communicating processors that allow easy programmability through an interface to OpenCL. The ALMARVI platform uses processing elements based on both VLIW and Transport Triggered Architectures (ρ-VEX and TCE cores, respectively). It can be implemented on Zynq devices such as the ZedBoard, and supports OpenCL by means of the pocl (Portable OpenCL) project and our ALMAIF interface specification. This allows developers to execute kernels transparently on either processing elements, thereby allowing to optimize execution time with minimal design and development effort.
Klasifikace
Druh
J<sub>imp</sub> - Článek v periodiku v databázi Web of Science
CEP obor
—
OECD FORD obor
20206 - Computer hardware and architecture
Návaznosti výsledku
Projekt
<a href="/cs/project/7H14004" target="_blank" >7H14004: ALMARVI - Algorithms, Design Methods, and Many-Core Execution Platform for Low-Power Massive Data-Rate Video and Image Processing</a><br>
Návaznosti
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Ostatní
Rok uplatnění
2019
Kód důvěrnosti údajů
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Údaje specifické pro druh výsledku
Název periodika
Journal of Signal Processing Systems for Signal Image and Video Technology
ISSN
1939-8018
e-ISSN
—
Svazek periodika
91
Číslo periodika v rámci svazku
1
Stát vydavatele periodika
US - Spojené státy americké
Počet stran výsledku
13
Strana od-do
61-73
Kód UT WoS článku
000455335500006
EID výsledku v databázi Scopus
2-s2.0-85059522887