Výkonnostní aspekty násobení řídké matice vektorem

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F07%3A03119698" target="_blank" >RIV/68407700:21230/07:03119698 - isvavai.cz</a>

Výsledek na webu

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DOI - Digital Object Identifier

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Jazyk výsledku

angličtina

Název v původním jazyce

Performance aspects of sparse matrix-vector multiplication

Popis výsledku v původním jazyce

Sparse matrix-vector multiplication (shortly SpMV) is an important building block in algorithms solving sparse systems of linear equations, e.g., FEM. Due to matrix sparsity, the memory access patterns are irregular and utilization of the cache can suffer from low spatial or temporal locality. Approaches to improve the performance of SpMV are based on matrix reordering and register blocking, sometimes combined with software-pipelining. Due to its overhead, register blocking achieves good speedups only for a large number of executions of SpMV with the same matrix A. We have investigated the impact of two simple SW transformation techniques (software-pipelining and loop unrolling) on the performance of SpMV, and have compared it with several implementation modifications aimed at reducing computational and memory complexity and improving the spatial locality. We investigate performance gains of these modifications on four CPU platforms.

Název v anglickém jazyce

Performance aspects of sparse matrix-vector multiplication

Popis výsledku anglicky

Sparse matrix-vector multiplication (shortly SpMV) is an important building block in algorithms solving sparse systems of linear equations, e.g., FEM. Due to matrix sparsity, the memory access patterns are irregular and utilization of the cache can suffer from low spatial or temporal locality. Approaches to improve the performance of SpMV are based on matrix reordering and register blocking, sometimes combined with software-pipelining. Due to its overhead, register blocking achieves good speedups only for a large number of executions of SpMV with the same matrix A. We have investigated the impact of two simple SW transformation techniques (software-pipelining and loop unrolling) on the performance of SpMV, and have compared it with several implementation modifications aimed at reducing computational and memory complexity and improving the spatial locality. We investigate performance gains of these modifications on four CPU platforms.

Druh

J_x - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)

CEP obor

IN - Informatika

OECD FORD obor

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Projekt

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Návaznosti

Z - Vyzkumny zamer (s odkazem do CEZ)

Rok uplatnění

2007

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

Acta Polytechnica

ISSN

1210-2709

e-ISSN

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Svazek periodika

2006

Číslo periodika v rámci svazku

3

Stát vydavatele periodika

CZ - Česká republika

Počet stran výsledku

6

Strana od-do

3-8

Kód UT WoS článku

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EID výsledku v databázi Scopus

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