An Effect of Output Capacitor ESL on Hysteretic PLL Controlled Multiphase Buck Converter

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F17%3A00315357" target="_blank" >RIV/68407700:21230/17:00315357 - isvavai.cz</a>

Výsledek na webu

<a href="https://www.radioeng.cz/fulltexts/2017/17_02_0515_0521.pdf" target="_blank" >https://www.radioeng.cz/fulltexts/2017/17_02_0515_0521.pdf</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.13164/re.2017.0515" target="_blank" >10.13164/re.2017.0515</a>

Jazyk výsledku

angličtina

Název v původním jazyce

An Effect of Output Capacitor ESL on Hysteretic PLL Controlled Multiphase Buck Converter

Popis výsledku v původním jazyce

This paper provides analysis of output capacitor effects to phase stability of a hysteretic mode controlled buck converter. The hysteretic control method is a simple and fast control technique for switched-mode converters, but the hysteresis control is not oscillator referenced. It results in difficulty to achieve stable switching phase and frequency. In recent papers, the authors propose a use of phase locked loops (PLL) to permit interleaved multiphase operation where each voltage regulator (VR) module is coupled together via output node and leads to a strong loop interaction. In this work analysis of this interaction is studied by Matlab Simulink simulations and a new solution how to partially suppress this effect is given. The proposed method confirms the theoretical analysis.

Název v anglickém jazyce

An Effect of Output Capacitor ESL on Hysteretic PLL Controlled Multiphase Buck Converter

Popis výsledku anglicky

This paper provides analysis of output capacitor effects to phase stability of a hysteretic mode controlled buck converter. The hysteretic control method is a simple and fast control technique for switched-mode converters, but the hysteresis control is not oscillator referenced. It results in difficulty to achieve stable switching phase and frequency. In recent papers, the authors propose a use of phase locked loops (PLL) to permit interleaved multiphase operation where each voltage regulator (VR) module is coupled together via output node and leads to a strong loop interaction. In this work analysis of this interaction is studied by Matlab Simulink simulations and a new solution how to partially suppress this effect is given. The proposed method confirms the theoretical analysis.

Druh

J_imp - Článek v periodiku v databázi Web of Science

CEP obor

—

OECD FORD obor

20201 - Electrical and electronic engineering

Projekt

—

Návaznosti

S - Specificky vyzkum na vysokych skolach

Rok uplatnění

2017

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

Radioengineering

ISSN

1210-2512

e-ISSN

—

Svazek periodika

26

Číslo periodika v rámci svazku

2

Stát vydavatele periodika

CZ - Česká republika

Počet stran výsledku

7

Strana od-do

515-521

Kód UT WoS článku

000403521700015

EID výsledku v databázi Scopus

2-s2.0-85020903963