An Embedded Implementation of Discrete Zolotarev Transform Using Hardware-Software Codesign

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F21%3A00347482" target="_blank" >RIV/68407700:21230/21:00347482 - isvavai.cz</a>

Výsledek na webu

<a href="https://doi.org/10.13164/re.2021.0364" target="_blank" >https://doi.org/10.13164/re.2021.0364</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.13164/re.2021.0364" target="_blank" >10.13164/re.2021.0364</a>

Jazyk výsledku

angličtina

Název v původním jazyce

An Embedded Implementation of Discrete Zolotarev Transform Using Hardware-Software Codesign

Popis výsledku v původním jazyce

The Discrete Zolotarev Transform (DZT) brings an improvement in the field of spectral analysis of non-stationary signals. However, the transformation algorithm called Approximated Discrete Zolotarev Transform (ADZT) suffers from high computational complexity. The Short Time ADZT (STADZT) requires high segment length, 512 samples, and more, while high segment overlap to prevent information loss, 75 % at least. The STADZT requirements along with the ADZT algorithm computational complexity result in a rather high computational load. The algorithm computational complexity, behavior, and quantization error impacts are analyzed. We present a solution which deals with high computational load employing co-design methods targeting Field Programmable Gate Array (FPGA). The system is able to compute one-shot DZT spectrum 2 048 samples long in ~22ms. Real-time STADZT spectrum of a mono audio signal of 16 kHz sampling frequency can be computed with overlap of 91 %.

Název v anglickém jazyce

An Embedded Implementation of Discrete Zolotarev Transform Using Hardware-Software Codesign

Popis výsledku anglicky

The Discrete Zolotarev Transform (DZT) brings an improvement in the field of spectral analysis of non-stationary signals. However, the transformation algorithm called Approximated Discrete Zolotarev Transform (ADZT) suffers from high computational complexity. The Short Time ADZT (STADZT) requires high segment length, 512 samples, and more, while high segment overlap to prevent information loss, 75 % at least. The STADZT requirements along with the ADZT algorithm computational complexity result in a rather high computational load. The algorithm computational complexity, behavior, and quantization error impacts are analyzed. We present a solution which deals with high computational load employing co-design methods targeting Field Programmable Gate Array (FPGA). The system is able to compute one-shot DZT spectrum 2 048 samples long in ~22ms. Real-time STADZT spectrum of a mono audio signal of 16 kHz sampling frequency can be computed with overlap of 91 %.

Druh

J_imp - Článek v periodiku v databázi Web of Science

CEP obor

—

OECD FORD obor

20201 - Electrical and electronic engineering

Projekt

—

Návaznosti

I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Rok uplatnění

2021

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

Radioengineering

ISSN

1210-2512

e-ISSN

1805-9600

Svazek periodika

30

Číslo periodika v rámci svazku

2

Stát vydavatele periodika

CZ - Česká republika

Počet stran výsledku

8

Strana od-do

364-371

Kód UT WoS článku

000719147800013

EID výsledku v databázi Scopus

2-s2.0-85108506975