Proposal and Properties of Ring Oscillator-Based PUF on FPGA

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F16%3A00241039" target="_blank" >RIV/68407700:21240/16:00241039 - isvavai.cz</a>

Výsledek na webu

<a href="http://dx.doi.org/10.1142/S0218126616400168" target="_blank" >http://dx.doi.org/10.1142/S0218126616400168</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1142/S0218126616400168" target="_blank" >10.1142/S0218126616400168</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Proposal and Properties of Ring Oscillator-Based PUF on FPGA

Popis výsledku v původním jazyce

This paper deals with design of physical unclonable functions (PUFs) based on field-programmable gate array (FPGA). The goal was to propose a cheap, efficient and secure device identification or even a cryptographic key generation based on PUFs. Therefore, a design of a ring oscillator (RO)-based PUF producing more output bits from each RO pair is presented. 24 Digilent Basys 2 FPGA boards (Spartan-3E) and 6 Digilent Nexys 3 FPGA boards (Spartan-6) were tested and statistically evaluated indicating suitability of the proposed design for device identification. A stable PUF output is required for generating cryptographic keys. As post-processing technique to further improve the efficiency of this PUF design, we used Gray code on the obtained bits from RO pairs. Ultimately, the PUF design is combined with error correction code and together with Gray code is able to generate cryptographic keys of sufficient length.

Název v anglickém jazyce

Proposal and Properties of Ring Oscillator-Based PUF on FPGA

Popis výsledku anglicky

This paper deals with design of physical unclonable functions (PUFs) based on field-programmable gate array (FPGA). The goal was to propose a cheap, efficient and secure device identification or even a cryptographic key generation based on PUFs. Therefore, a design of a ring oscillator (RO)-based PUF producing more output bits from each RO pair is presented. 24 Digilent Basys 2 FPGA boards (Spartan-3E) and 6 Digilent Nexys 3 FPGA boards (Spartan-6) were tested and statistically evaluated indicating suitability of the proposed design for device identification. A stable PUF output is required for generating cryptographic keys. As post-processing technique to further improve the efficiency of this PUF design, we used Gray code on the obtained bits from RO pairs. Ultimately, the PUF design is combined with error correction code and together with Gray code is able to generate cryptographic keys of sufficient length.

Druh

J_x - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)

CEP obor

JC - Počítačový hardware a software

OECD FORD obor

—

Projekt

—

Návaznosti

S - Specificky vyzkum na vysokych skolach<br>I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Rok uplatnění

2016

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS

ISSN

0218-1266

e-ISSN

—

Svazek periodika

25

Číslo periodika v rámci svazku

3

Stát vydavatele periodika

SG - Singapurská republika

Počet stran výsledku

17

Strana od-do

—

Kód UT WoS článku

000369644000007

EID výsledku v databázi Scopus

2-s2.0-84952718328