Characterization of the radiation tolerant ToASt ASIC for the readout of the PANDA MVD strip detector
Identifikátory výsledku
Kód výsledku v IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21340%2F24%3A00381518" target="_blank" >RIV/68407700:21340/24:00381518 - isvavai.cz</a>
Výsledek na webu
<a href="https://doi.org/10.1088/1748-0221/19/04/C04047" target="_blank" >https://doi.org/10.1088/1748-0221/19/04/C04047</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1088/1748-0221/19/04/C04047" target="_blank" >10.1088/1748-0221/19/04/C04047</a>
Alternativní jazyky
Jazyk výsledku
angličtina
Název v původním jazyce
Characterization of the radiation tolerant ToASt ASIC for the readout of the PANDA MVD strip detector
Popis výsledku v původním jazyce
The ToASt ASIC is a 64 -channel integrated circuit developed for the readout of the Silicon strip detector project designed to be placed in the Micro -Vertex Detector of the PANDA experiment. ToASt is implemented in a commercial 110 nm CMOS technology and can provide information on the position, time, and deposited energy of the particle passing through the detector. Its time resolution is given by its 160 MHz master clock. The ASIC has been developed in the framework of the European FAIRnet project. The chip has been characterized electrically both standalone and coupled with sensors, with focus on its noise performances. It has also been tested for radiation tolerance, both in terms of Total Ionizing Dose and Single Event Upset. In particular, this work aims to guarantee that the studied ASICs can sustain the levels of ionizing radiation expected in the PANDA experiment and to study the noise characteristics for the two polarities of the ASIC.
Název v anglickém jazyce
Characterization of the radiation tolerant ToASt ASIC for the readout of the PANDA MVD strip detector
Popis výsledku anglicky
The ToASt ASIC is a 64 -channel integrated circuit developed for the readout of the Silicon strip detector project designed to be placed in the Micro -Vertex Detector of the PANDA experiment. ToASt is implemented in a commercial 110 nm CMOS technology and can provide information on the position, time, and deposited energy of the particle passing through the detector. Its time resolution is given by its 160 MHz master clock. The ASIC has been developed in the framework of the European FAIRnet project. The chip has been characterized electrically both standalone and coupled with sensors, with focus on its noise performances. It has also been tested for radiation tolerance, both in terms of Total Ionizing Dose and Single Event Upset. In particular, this work aims to guarantee that the studied ASICs can sustain the levels of ionizing radiation expected in the PANDA experiment and to study the noise characteristics for the two polarities of the ASIC.
Klasifikace
Druh
J<sub>imp</sub> - Článek v periodiku v databázi Web of Science
CEP obor
—
OECD FORD obor
10304 - Nuclear physics
Návaznosti výsledku
Projekt
—
Návaznosti
I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace
Ostatní
Rok uplatnění
2024
Kód důvěrnosti údajů
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Údaje specifické pro druh výsledku
Název periodika
Journal of Instrumentation
ISSN
1748-0221
e-ISSN
1748-0221
Svazek periodika
19
Číslo periodika v rámci svazku
4
Stát vydavatele periodika
IT - Italská republika
Počet stran výsledku
10
Strana od-do
—
Kód UT WoS článku
001217558600001
EID výsledku v databázi Scopus
2-s2.0-85191350899