A digitally programmable gain amplifier for ultra-low-power applications

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21460%2F15%3A00242071" target="_blank" >RIV/68407700:21460/15:00242071 - isvavai.cz</a>

Nalezeny alternativní kódy

RIV/00216305:26220/15:PU114947

Výsledek na webu

<a href="http://dx.doi.org/10.1007/s10470-015-0621-0" target="_blank" >http://dx.doi.org/10.1007/s10470-015-0621-0</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1007/s10470-015-0621-0" target="_blank" >10.1007/s10470-015-0621-0</a>

Jazyk výsledku

angličtina

Název v původním jazyce

A digitally programmable gain amplifier for ultra-low-power applications

Popis výsledku v původním jazyce

This paper presents a subthreshold CMOS digitally programmable gain amplifier for ultra-low-power signal processing applications. The subthreshold MOS transistor technique is used to achieve low-power consumption of the proposed circuit. The structure isconstituted by a class-AB current amplifier which can handle a wide input signal. The gain of the digitally programmable gain amplifier is regulated by using current digital signal level without switch requirements; hence low circuit complexity, low power consumption and low number of devices can be obtained. Also both non-inverting and inverting amplifiers can be easily obtained into one single topology. Using additional resistors to convert the current to the voltage, single-input and differential-input digitally programmable voltage gain amplifiers can be obtained. The proposed circuit is simulated using 0.5 mu m CMOS technology. The simulation results show that the proposed circuit consumes very low power from +/- 1.2 V power suppl

Název v anglickém jazyce

A digitally programmable gain amplifier for ultra-low-power applications

Popis výsledku anglicky

This paper presents a subthreshold CMOS digitally programmable gain amplifier for ultra-low-power signal processing applications. The subthreshold MOS transistor technique is used to achieve low-power consumption of the proposed circuit. The structure isconstituted by a class-AB current amplifier which can handle a wide input signal. The gain of the digitally programmable gain amplifier is regulated by using current digital signal level without switch requirements; hence low circuit complexity, low power consumption and low number of devices can be obtained. Also both non-inverting and inverting amplifiers can be easily obtained into one single topology. Using additional resistors to convert the current to the voltage, single-input and differential-input digitally programmable voltage gain amplifiers can be obtained. The proposed circuit is simulated using 0.5 mu m CMOS technology. The simulation results show that the proposed circuit consumes very low power from +/- 1.2 V power suppl

Druh

J_x - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)

CEP obor

JA - Elektronika a optoelektronika, elektrotechnika

OECD FORD obor

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Projekt

Výsledek vznikl pri realizaci vícero projektů. Více informací v záložce Projekty.

Návaznosti

I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Rok uplatnění

2015

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

Analog Integrated Circuits and Signal Processing

ISSN

0925-1030

e-ISSN

—

Svazek periodika

85

Číslo periodika v rámci svazku

3

Stát vydavatele periodika

US - Spojené státy americké

Počet stran výsledku

11

Strana od-do

433-443

Kód UT WoS článku

000363940900006

EID výsledku v databázi Scopus

2-s2.0-84945471663