VU Meter Driver Simulation and Design

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F70883521%3A28140%2F11%3A43866482" target="_blank" >RIV/70883521:28140/11:43866482 - isvavai.cz</a>

Výsledek na webu

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DOI - Digital Object Identifier

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Jazyk výsledku

angličtina

Název v původním jazyce

VU Meter Driver Simulation and Design

Popis výsledku v původním jazyce

This paper deals with a design, construction and practical testing of a VU meter driver that includes an accurate rectifier and logarithmical driver of a pointer-type gauge. The logarithm is taken from the rectified signal by employing a capacitor discharge voltage curve. Several software simulations were made in order to proof the circuit design. Then a simple rectifier and logarithmiser was designed and built in order these simulations were proved and afterwards, based on the gained experience, the more complex design of the VU meter driver was created. The paper incorporates mathematical description of the circuit, simulation results and results gained when the simple driver circuit underwent several physical tests as well as further propositions for practical extensions of the designed circuit.

Název v anglickém jazyce

VU Meter Driver Simulation and Design

Popis výsledku anglicky

This paper deals with a design, construction and practical testing of a VU meter driver that includes an accurate rectifier and logarithmical driver of a pointer-type gauge. The logarithm is taken from the rectified signal by employing a capacitor discharge voltage curve. Several software simulations were made in order to proof the circuit design. Then a simple rectifier and logarithmiser was designed and built in order these simulations were proved and afterwards, based on the gained experience, the more complex design of the VU meter driver was created. The paper incorporates mathematical description of the circuit, simulation results and results gained when the simple driver circuit underwent several physical tests as well as further propositions for practical extensions of the designed circuit.

Druh

J_x - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)

CEP obor

JA - Elektronika a optoelektronika, elektrotechnika

OECD FORD obor

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Projekt

<a href="/cs/project/ED2.1.00%2F03.0089" target="_blank" >ED2.1.00/03.0089: Centrum bezpečnostních, informačních a pokročilých technologií (CEBIA-Tech)</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach

Rok uplatnění

2011

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

International Journal of Mathematics and Computers in Simulations

ISSN

1998-0159

e-ISSN

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Svazek periodika

5

Číslo periodika v rámci svazku

5

Stát vydavatele periodika

GB - Spojené království Velké Británie a Severního Irska

Počet stran výsledku

8

Strana od-do

454-461

Kód UT WoS článku

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EID výsledku v databázi Scopus

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