Distortion caused by controlling transistor implemented in the voltage controlled amplifier

Kód výsledku v IS VaVaI

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Výsledek na webu

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DOI - Digital Object Identifier

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Jazyk výsledku

angličtina

Název v původním jazyce

Distortion caused by controlling transistor implemented in the voltage controlled amplifier

Popis výsledku v původním jazyce

This paper describes a voltage controlled amplifier with linearized response to the controlling voltage and discusses its harmonic distortion. As a controlling element, a JFET transistor has been utilized. The design of the amplifier has been made with the aid of Maple mathematical software and National Instruments Multisim circuit simulator. During the simulations, it was found that the controlling transistor would probably introduce significant distortion into the signal path. Therefore a set of measurements on real circuit was made in order to verify that the SPICE model of the transistor provided relevant results during the simulation. Both, the simulated and the really measured parameters of the amplifier are discussed within the framework of this paper.

Název v anglickém jazyce

Distortion caused by controlling transistor implemented in the voltage controlled amplifier

Popis výsledku anglicky

This paper describes a voltage controlled amplifier with linearized response to the controlling voltage and discusses its harmonic distortion. As a controlling element, a JFET transistor has been utilized. The design of the amplifier has been made with the aid of Maple mathematical software and National Instruments Multisim circuit simulator. During the simulations, it was found that the controlling transistor would probably introduce significant distortion into the signal path. Therefore a set of measurements on real circuit was made in order to verify that the SPICE model of the transistor provided relevant results during the simulation. Both, the simulated and the really measured parameters of the amplifier are discussed within the framework of this paper.

Druh

D - Stať ve sborníku

CEP obor

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OECD FORD obor

20201 - Electrical and electronic engineering

Projekt

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Návaznosti

V - Vyzkumna aktivita podporovana z jinych verejnych zdroju

Rok uplatnění

2020

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

13th International Conference ELEKTRO 2020, ELEKTRO 2020 - Proceedings

ISBN

978-172817542-3

ISSN

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e-ISSN

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Počet stran výsledku

6

Strana od-do

1-6

Název nakladatele

Institute of Electrical and Electronics Engineers Inc.

Místo vydání

Piscataway, New Jersey

Místo konání akce

Taormina

Datum konání akce

25. 5. 2020

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

000621581100086