Bipolar transistor structure electrical characterization

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F05%3APU54410" target="_blank" >RIV/00216305:26220/05:PU54410 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Bipolar transistor structure electrical characterization

Original language description

The bipolar transistor model parameters extraction method based on device simulator generated electrical characteristics is presented. The forward active region electrical characteristics generated by device simulator DESSIS substitute for the measured ones. The methodology links the device simulator DESSIS and electrical simulator HSPICE and enables to extract parameter numerical values of HSPICE built-in bipolar transistor model. The individual steps to create bipolar transistor structure, generaate corresponding mesh, simulate device structure, convert electrical data from DESSIS to HSPICE, extract model parameter values and evaluate the results are described.

Czech name

Bipolar transistor structure electrical characterization

Czech description

The bipolar transistor model parameters extraction method based on device simulator generated electrical characteristics is presented. The forward active region electrical characteristics generated by device simulator DESSIS substitute for the measured ones. The methodology links the device simulator DESSIS and electrical simulator HSPICE and enables to extract parameter numerical values of HSPICE built-in bipolar transistor model. The individual steps to create bipolar transistor structure, generaate corresponding mesh, simulate device structure, convert electrical data from DESSIS to HSPICE, extract model parameter values and evaluate the results are described.

Type

D - Article in proceedings

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

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Project

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Continuities

Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2005

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Socrates Workshop 2005, Intensive Training Programme in Electronic System Design - Proceedings

ISBN

80-214-3042-7

ISSN

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e-ISSN

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Number of pages

5

Pages from-to

63-67

Publisher name

Nakl. Novotný

Place of publication

Brno

Event location

Chania, Crete, Greece

Event date

Sep 21, 2005

Type of event by nationality

CST - Celostátní akce

UT code for WoS article

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