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Design of FPGA-Based Dependable Systems

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F08%3APU76802" target="_blank" >RIV/00216305:26230/08:PU76802 - isvavai.cz</a>

  • Result on the web

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    Design of FPGA-Based Dependable Systems

  • Original language description

    In this paper, the new methodology from areas fault tolerant systems based on automated generation of checkers in FPGA is presented. Dependability models of architectures based on the use of on-line checkers are described in the paper as well. First, theresults of our research in the area of on-line checkers design are described. It is shown how the architectures with on-line checkers can be used in implementing dependable systems into FPGA and required dependability parameters. It is shown how the dependability parameters are derived from the architecture of the system and used for the design of dependable systems into XILINX FPGA.

  • Czech name

    Design of FPGA-Based Dependable Systems

  • Czech description

    In this paper, the new methodology from areas fault tolerant systems based on automated generation of checkers in FPGA is presented. Dependability models of architectures based on the use of on-line checkers are described in the paper as well. First, theresults of our research in the area of on-line checkers design are described. It is shown how the architectures with on-line checkers can be used in implementing dependable systems into FPGA and required dependability parameters. It is shown how the dependability parameters are derived from the architecture of the system and used for the design of dependable systems into XILINX FPGA.

Classification

  • Type

    D - Article in proceedings

  • CEP classification

    JC - Computer hardware and software

  • OECD FORD branch

Result continuities

  • Project

    <a href="/en/project/GD102%2F05%2FH050" target="_blank" >GD102/05/H050: Integrated Approach to Education of PhD Students in the Area of Parallel and Distributed Systems</a><br>

  • Continuities

    Z - Vyzkumny zamer (s odkazem do CEZ)

Others

  • Publication year

    2008

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    4th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science

  • ISBN

    978-80-7355-082-0

  • ISSN

  • e-ISSN

  • Number of pages

    8

  • Pages from-to

  • Publisher name

    Masaryk University

  • Place of publication

    Znojmo

  • Event location

    Znojmo

  • Event date

    Nov 14, 2008

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article