Methodology for Reliability Analysis of FPGA-based Fault Tolerant Systems

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F12%3APU101813" target="_blank" >RIV/00216305:26230/12:PU101813 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Methodology for Reliability Analysis of FPGA-based Fault Tolerant Systems
Original language description
In this paper, a methodology for reliability and availability analysis of fault tolerant architectures based on partial reconfiguration implemented into FPGA is presented. First, the introduction into the system reliability, Markov models and dependability parametres is given. Then, the priciples of methodology for generation of Markov model for duplex architecture with checkers are shown together with the evaluation of failure rate and repair rate of this architecture. Finally, it is demonstrated howthe reliability and availability parameters are derived from this model for different configurations of architecture and faulty modules. The reliability analysis results are shown in the graphs.
Czech name
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Czech description
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Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>Z - Vyzkumny zamer (s odkazem do CEZ)<br>S - Specificky vyzkum na vysokych skolach

Publication year
2012
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
CSE'2012 International Scientific Conference on Computer Science and Engineering
ISBN
978-80-8143-049-7
ISSN
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e-ISSN
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Number of pages
8
Pages from-to
146-153
Publisher name
The University of Technology Košice
Place of publication
Košice
Event location
Stará Lesná
Event date
Oct 3, 2012
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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