Optimizations of packet classification algorithms
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F10%3APU89617" target="_blank" >RIV/00216305:26230/10:PU89617 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Optimizations of packet classification algorithms
Original language description
This paper deals with packet classification in computer networks. As network speeds are increasing, the demand for hardware acceleration of packet classification in FPGAs or ASICs are growing. Nowadays algorithms implemented in hardware can achieve multigigabit speeds, but they suffer with great memory overhead. A new architecture which reduces memory overhead of decomposition methods for packet classification is proposed.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
JC - Computer hardware and software
OECD FORD branch
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Result continuities
Project
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Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)<br>S - Specificky vyzkum na vysokych skolach
Others
Publication year
2010
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Počítačové architektury & diagnostika 2010
ISBN
978-80-214-4140-8
ISSN
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e-ISSN
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Number of pages
6
Pages from-to
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Publisher name
Faculty of Information Technology BUT
Place of publication
Češkovice
Event location
Češkovice
Event date
Sep 13, 2010
Type of event by nationality
CST - Celostátní akce
UT code for WoS article
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