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An Experimental Evaluation of Fault-Tolerant FPGA-based Robot Controller

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F18%3APU130752" target="_blank" >RIV/00216305:26230/18:PU130752 - isvavai.cz</a>

  • Result on the web

    <a href="https://www.fit.vut.cz/research/publication/11747/" target="_blank" >https://www.fit.vut.cz/research/publication/11747/</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/EWDTS.2018.8524627" target="_blank" >10.1109/EWDTS.2018.8524627</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    An Experimental Evaluation of Fault-Tolerant FPGA-based Robot Controller

  • Original language description

    Field Programmable Gate Arrays (FPGAs) are becoming more popular in various areas. Single Event Upsets (SEUs) are faults caused by a charged particle in the configuration memory of SRAM-based FPGAs. Such a charged particle can cause incorrect behavior in the whole system. This problem becomes greater if such a system operates in an environment with increased radiation (e.g. space applications). Lots of techniques to harden FPGAs against faults exist and new ones are under investigation. One such technique is called Triple Modular Redundancy (TMR). It is important to evaluate these techniques on a real system with a real FPGA. An evaluation platform based on an artificial fault injection and a functional verification for testing fault tolerance methodologies is introduced in this paper. Parts of our experimental system are hardened by using TMR and its experimental evaluation is one of the main parts of this paper. We propose experiments with various fault injection strategies (single and multiple faults) and monitor its impact on both the electronic and mechanical parts of the experimental system.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

  • OECD FORD branch

    20206 - Computer hardware and architecture

Result continuities

  • Project

    Result was created during the realization of more than one project. More information in the Projects tab.

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach

Others

  • Publication year

    2018

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proceedings of IEEE East-West Design & Test Symposium

  • ISBN

    978-1-5386-5710-2

  • ISSN

  • e-ISSN

  • Number of pages

    7

  • Pages from-to

    63-69

  • Publisher name

    IEEE Computer Society

  • Place of publication

    Kazan

  • Event location

    Kazan, Rusko

  • Event date

    Sep 14, 2018

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article

    000517795800014