Extended Reliability Analysis of Fault-Tolerant FPGA-based Robot Controller

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F19%3APU131688" target="_blank" >RIV/00216305:26230/19:PU131688 - isvavai.cz</a>

Result on the web

<a href="https://www.fit.vut.cz/research/publication/11863/" target="_blank" >https://www.fit.vut.cz/research/publication/11863/</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1109/LATW.2019.8704554" target="_blank" >10.1109/LATW.2019.8704554</a>

Result language

angličtina

Original language name

Extended Reliability Analysis of Fault-Tolerant FPGA-based Robot Controller

Original language description

The reliability of safety-critical systems is very important especially in case of electronic systems which are working in environment with increased occurrence of faults. As an example, space, aerospace or medical systems can serve. Fault tolerance is one of the techniques the goal of which is to avoid the impact of faults on such systems. Lots of fault tolerance techniques exists and new ones are under investigation. This paper is targeted mainly to Field Programmable Gate Arrays (FPGAs) which are also the target technology of many fault tolerant techniques. It is important to evaluate and test these techniques. This paper is the continuation of our previously published research results which presents experimental approach to evaluate such fault tolerance techniques by monitoring the impact of faults in the experimental electro-mechanical system utilizing robot navigation in a maze. However, in this paper, we research and compare similarities of the theoretical estimation to various methods of the SEU injection approaches. The theoretical estimation is calculated using known equations. The impact of artificially faults injected into the electronic controller, in which Triple Modular Redundancy is applied, is monitored and used for statistic reliability analysis. This approach serves as a tool for the fast reliability evaluation during the development process of fault tolerance systems.

Czech name

—

Czech description

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Type

D - Article in proceedings

CEP classification

—

OECD FORD branch

20206 - Computer hardware and architecture

Project

Result was created during the realization of more than one project. More information in the Projects tab.

Continuities

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach

Publication year

2019

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

20th IEEE Latin American Test Symposium (LATS 2019)

ISBN

978-1-7281-1756-0

ISSN

—

e-ISSN

—

Number of pages

4

Pages from-to

97-100

Publisher name

IEEE Computer Society

Place of publication

Santiago

Event location

Hotel Fundador, Santiago de Chile

Event date

Mar 11, 2019

Type of event by nationality

WRD - Celosvětová akce

UT code for WoS article

000469850000004