All

What are you looking for?

All
Projects
Results
Organizations

Quick search

  • Projects supported by TA ČR
  • Excellent projects
  • Projects with the highest public support
  • Current projects

Smart search

  • That is how I find a specific +word
  • That is how I leave the -word out of the results
  • “That is how I can find the whole phrase”

Near-zero hysteresis van der Waals MnAl2S4 field-effect transistors with low minimal threshold voltage degradation and high thermal stability

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26620%2F26%3A0200721" target="_blank" >RIV/00216305:26620/26:0200721 - isvavai.cz</a>

  • Result on the web

    <a href="https://www.nature.com/articles/s43246-025-01020-w" target="_blank" >https://www.nature.com/articles/s43246-025-01020-w</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1038/s43246-025-01020-w" target="_blank" >10.1038/s43246-025-01020-w</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Near-zero hysteresis van der Waals MnAl2S4 field-effect transistors with low minimal threshold voltage degradation and high thermal stability

  • Original language description

    The integration of high-quality, ultrathin van der Waals (vdW) dielectrics with 2D semiconductors remains a critical bottleneck in the development of reliable, ultra-scaled field-effect transistors (FETs). Here, we report a comprehensive study of MoS2-based FETs employing layered rhombohedral MnAl2S4 as the gate insulator, a previously unexplored vdW dielectric that can be isolated down to the monolayer limit. Devices fabricated in both top-gated (TG) and bottom-gated (BT) configurations exhibit excellent electrical performance, featuring low gate leakage, minimal hysteresis ( < 2 mV) under high electric fields up to 11 MV cm(-1) across a wide range of gate voltage sweep rates (0.001-10 Vs(-1)). We observed a consistent counterclockwise hysteresis and an anomalous bias temperature instability (BTI), possibly caused by the diffusion of Mn interstitials and S vacancies formed inside the MnAl2S4 film during growth. Notably, we show that threshold voltage degradation at high temperatures was observed to be negligible, and hysteresis dynamics and very small BTI are reproducible over a long time, demonstrating the high reliability of our devices. In addition, the vdW interface between MnAl2S4 and MoS2 in our device is of good quality and is expected to provide a small density of insulator defects, a promising gate dielectric for reliable 2D devices.

  • Czech name

  • Czech description

Classification

  • Type

    J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database

  • CEP classification

  • OECD FORD branch

    20201 - Electrical and electronic engineering

Result continuities

  • Project

  • Continuities

    I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Others

  • Publication year

    2026

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Name of the periodical

    Communications Materials

  • ISSN

  • e-ISSN

    2662-4443

  • Volume of the periodical

    7

  • Issue of the periodical within the volume

    1

  • Country of publishing house

    GB - UNITED KINGDOM

  • Number of pages

    11

  • Pages from-to

  • UT code for WoS article

    001658758800001

  • EID of the result in the Scopus database

    2-s2.0-105026986337