Scan Based Circuits with Low Power Consumption

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F46747885%3A24220%2F03%3A00000031" target="_blank" >RIV/46747885:24220/03:00000031 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Scan Based Circuits with Low Power Consumption
Original language description
An alternative parallel diagnostic access method called Random Access Scan (RAS) is not used in nowadays ICs because of more difficult routability. In spite of this fact the diagnostic methods with a random access to IC FFs are much less energy consumingThey have a disadvantage of higher hardware overhead. In order to maximize power savings and minimize the hardware overhead we have proposed a modified RAS diagnostic access method, which can be used together with the BS. The RAS cells, controlled by theBS TAP controller, replace internal scan chain FFs, which are known as sources of unwanted circuit activity during shifting test patterns. We have calculated the hardware overhead of the RAS circuits and the power dissipaWe have found that the proposedBS and RAS combination could be very useful for low power design and it does not introduce any additional delay in the functional path.
Czech name
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Czech description
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Project
<a href="/en/project/GA102%2F01%2F0566" target="_blank" >GA102/01/0566: Built-in self test equipment optimisation methods in integrated circuits</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2003
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

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