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Investigating diachrony of programmable microelectronic nanostructures

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F46747885%3A24220%2F13%3A%230002861" target="_blank" >RIV/46747885:24220/13:#0002861 - isvavai.cz</a>

  • Result on the web

    <a href="http://www.scopus.com/record/display.url?origin=AuthorProfile&view=basic&eid=2-s2.0-84891517542" target="_blank" >http://www.scopus.com/record/display.url?origin=AuthorProfile&view=basic&eid=2-s2.0-84891517542</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/ECMSM.2013.6648931" target="_blank" >10.1109/ECMSM.2013.6648931</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Investigating diachrony of programmable microelectronic nanostructures

  • Original language description

    New technologies of design and manufacturing of advanced integrated circuits allow higher integration of complex structures in ultra-high nano-scale densities. The rapidly growing world of FPGA devices creates important platform for analyses of process scaling and new study opportunities in case of new process variations and degradation effects. However the real devices are not the ideal ones and they are subjects of aging of the internal nanostructures. Changes in parameters of FPGAs in time, or undereither power supply voltage or temperature variations, can result in significant delays and may affect the final design quality and dependability. Such timing variations may result in delay faults, up to the final device or equipment malfunction or failure. Especially the world of ASIC devices is comprehensively investigated again and again with the new processes coming every (approximately) 2 years. This paper presents an unusual solution of the aging measurement, analysis and test unit

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

    JC - Computer hardware and software

  • OECD FORD branch

Result continuities

  • Project

    <a href="/en/project/LD13019" target="_blank" >LD13019: Improvement in Reliability of Nano-scale circuits</a><br>

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach

Others

  • Publication year

    2013

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    11th IEEE International Workshop on Electronics, Control, Measurement, Signals and Their Application to Mechatronics, ECMSM 2013

  • ISBN

    9781467362979

  • ISSN

  • e-ISSN

  • Number of pages

    4

  • Pages from-to

  • Publisher name

    IEEE Computer Society

  • Place of publication

  • Event location

    Toulouse; France

  • Event date

    Jan 1, 2013

  • Type of event by nationality

    EUR - Evropská akce

  • UT code for WoS article