Nonlinear On-Chip Capacitor Characterization
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F60162694%3AG43__%2F07%3A00398636" target="_blank" >RIV/60162694:G43__/07:00398636 - isvavai.cz</a>
Result on the web
<a href="http://vavtest.unob.cz/registr" target="_blank" >http://vavtest.unob.cz/registr</a>
DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Nonlinear On-Chip Capacitor Characterization
Original language description
The paper deals with a modification of the CBCM method for nonlinear on-chip capacitance characterization. The proposed modification uses two DC swept sources to measure the whole nonlinear Q-v characteristic in both polarities without the necessity to switch the object being measured. A test-chip implementing the method was designed and manufactured in the 0.35?m CMOS process. It was used for MOSCAP characterization in the full operating voltage range.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
JA - Electronics and optoelectronics
OECD FORD branch
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Result continuities
Project
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Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2007
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
The European Conference on Circuit Theory and Design (ECCTD).
ISBN
978-1-4244-1341-6
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
220-223
Publisher name
IEEE
Place of publication
Sevilla, Spain
Event location
Sevilla, Spain
Event date
Jan 1, 2007
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000258708400056