Matlab Toolbox for high-level bit-exact emulation of HandelC VHDL FPGA designs.
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F67985556%3A_____%2F02%3A16020009" target="_blank" >RIV/67985556:_____/02:16020009 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Matlab Toolbox for high-level bit-exact emulation of HandelC VHDL FPGA designs.
Original language description
The university booth presents Matlab tolbox, which supports two possible solutions for floating-point-like ALUs, based on a 32-bit and 20-bit logarithmic arithmetic. Both Virtex FPGA cores are encapsulated in function-like API interface compatible with DK1 tool from Celoxica (Handel C).DSP designers can create optimized VLIW program flow with 32-bit or 20-bit FP-like data range and precision. Code can be source-code-debugged and compiled from high-level to the target Virtex FPGA.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
JC - Computer hardware and software
OECD FORD branch
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Result continuities
Project
<a href="/en/project/LN00B096" target="_blank" >LN00B096: Center for Applied Cybernetics</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2002
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Design, Automation and Test in Europe DATE.-.02.
ISBN
0-7695-1471-5
ISSN
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e-ISSN
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Number of pages
1
Pages from-to
264
Publisher name
IEEE
Place of publication
Los Alamitos
Event location
Paris [FR]
Event date
Mar 4, 2002
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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