VIRTUAL TESTING METHOD FOR STATIC ADC NON-LINEARITY - RSD CYCLIC A/D CONVERTER CASE

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F09%3A00157682" target="_blank" >RIV/68407700:21230/09:00157682 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
VIRTUAL TESTING METHOD FOR STATIC ADC NON-LINEARITY - RSD CYCLIC A/D CONVERTER CASE
Original language description
One of the recent approaches to test A/D converter performance is the so-called Servo-Loop Method. This method is aimed at the non-linearity extraction of static ADC transfer curve. In this paper, we prove an advanced Servo-Loop version focusing on behavioral and transistor-level example of the Residual Signed Digit (RSD) cyclic A/D converter design. In this paper, we establish a Virtual Testing Environment (VTE) built on Verilog-A implementation of the Servo-Loop unit fully integrated into Cadence design environment.
Czech name
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Czech description
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Project
<a href="/en/project/GA102%2F07%2F1186" target="_blank" >GA102/07/1186: Sophisticated methods of the analog and mixed-signal circuits design in sub-micron technologies</a><br>
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year
2009
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
XIX IMEKO World Congress 2009 - Fundamental and Applied Metrology
ISBN
978-963-88410-0-1
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
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Publisher name
Instituto Superior Técnico/Instituto de Telecomunicaçoes Portugal
Place of publication
Lisbon
Event location
Lisabon
Event date
Sep 6, 2009
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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