Comparison of Waffle and standard gate pattern base on specific onresistance

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F14%3A00218506" target="_blank" >RIV/68407700:21230/14:00218506 - isvavai.cz</a>
Result on the web
<a href="http://www.imaps.cz/eds/" target="_blank" >http://www.imaps.cz/eds/</a>
DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Comparison of Waffle and standard gate pattern base on specific onresistance
Original language description
The main goal of this work is to compare the different Waffle MOS structures as function between main dimensions and channel resistance (specific on-resistance). Even if Waffle MOS structure is so general that it is independent on dedicated CMOS processin fact constrains coming from specific CMOS process design rules has main influence on final Waffle MOS shape and final required area. Comparison describing how dimensions of Waffle MOS have influence on channel resistance would be proposed. Due to non-conventional gate geometry of the Waffle MOS transistor compare to the fingers structure, the channel W/L ratio calculation is not trivial and conformal Schwarz-Christoffel Transformation mapping was used.
Czech name
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Czech description
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Publication year
2014
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Electronic Devices and Systems IMAPS CS International Conference 2014
ISBN
978-80-214-4985-5
ISSN
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e-ISSN
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Number of pages
6
Pages from-to
1226-1231
Publisher name
Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií
Place of publication
Brno
Event location
Brno
Event date
Jun 25, 2014
Type of event by nationality
EUR - Evropská akce
UT code for WoS article
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