Implicit Rrepresentations in Customized Testing of Digital Circuits

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F10%3A00170151" target="_blank" >RIV/68407700:21240/10:00170151 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Implicit Rrepresentations in Customized Testing of Digital Circuits
Original language description
Despite of the growing number of analog and mixed signal parts in electronic devices, there are still many challenges in digital circuits testing. Many test patterns generation and compression methods for digital circuits have been developed, but their efficiency can dramatically depend on the representation of test vectors sets. Also the importance of additional requirements imposed upon a test set increases. In this paper we consider implicit representations of test patterns sets and possibilities oftheir use in test patterns generation, compression and constrained test generation. We suppose that by using a proper implicit representation and a set of possible constraints, a significant improvement in customized test generation is possible.
Czech name
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Czech description
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Project
<a href="/en/project/GA102%2F09%2F1668" target="_blank" >GA102/09/1668: SoC circuits reliability and availability improvement</a><br>
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)<br>S - Specificky vyzkum na vysokych skolach

Publication year
2010
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

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