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Enhanced duplication method with TMR-like masking abilities

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F16%3A00301329" target="_blank" >RIV/68407700:21240/16:00301329 - isvavai.cz</a>

  • Result on the web

    <a href="http://dx.doi.org/10.1109/DSD.2016.91" target="_blank" >http://dx.doi.org/10.1109/DSD.2016.91</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/DSD.2016.91" target="_blank" >10.1109/DSD.2016.91</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Enhanced duplication method with TMR-like masking abilities

  • Original language description

    This paper proposes a method improving the faultcoverage capabilities of Field Programmable Gate Array (FPGA) designs. Faults are mostly single event upsets (SEUs) in the configuration memory of SRAM-based FPGAs and they can change the functionality of an implemented design. These changes may lead to crucial mistakes and cause damage to people and environment. The proposed method utilizes Concurrent Error Detection (CED) techniques and the basic architectures of actual modern FPGAs – the Look-Up Table (LUT) with two outputs. The Parity Waterfall method (based on a cascade – waterfall – of several waves of inner parity generating the final parity of outputs of the whole circuit) presented in our previous paper has been encapsulated into a Duplication scheme in this paper. This encapsulation allows us to create a system containing two independent copies of all parts able to detect and localize any single fault (like common Triple Modular Redundancy (TMR) method). Experiments are performed on the standard set of IWLS2005 benchmarks in our simulator. The results demonstrate differences between our proposed method in comparison with TMR – the proposed method has a lower relative overhead and requires a lower number of inputs and outputs.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

    JC - Computer hardware and software

  • OECD FORD branch

Result continuities

  • Project

    Result was created during the realization of more than one project. More information in the Projects tab.

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2016

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proceedings of 19th Euromicro Conference on Digital System Design DSD 2016

  • ISBN

    978-1-5090-2816-0

  • ISSN

  • e-ISSN

  • Number of pages

    4

  • Pages from-to

    690-693

  • Publisher name

    IEEE Computer Soc.

  • Place of publication

    Los Alamitos, CA

  • Event location

    Limassol, Cyprus

  • Event date

    Aug 31, 2016

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article

    000386638800095