Emerging Technologies: Challenges and Opportunities for Logic Synthesis

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F21%3A00349690" target="_blank" >RIV/68407700:21240/21:00349690 - isvavai.cz</a>
Result on the web
<a href="http://dx.doi.org/10.1109/DDECS52668.2021.9417062" target="_blank" >http://dx.doi.org/10.1109/DDECS52668.2021.9417062</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/DDECS52668.2021.9417062" target="_blank" >10.1109/DDECS52668.2021.9417062</a>

Result language
angličtina
Original language name
Emerging Technologies: Challenges and Opportunities for Logic Synthesis
Original language description
In computer engineering, logic synthesis is a process by which an abstract specification of desired circuit behavior is turned into a design implementation in terms of logic gates. Historically, logic synthesis was tightly related to the physical implementation of the logic gates. Nowadays, pushed by the forecasted end of Moore's law, several emerging technologies (e.g., nanodevices, optical computing, quantum computing) are candidates to either replace or co-exist with the textit{de facto} standard CMOS technology. The main consequence of the rising of those emerging technologies is that the logic synthesis has to face new issues and, at the same time, exploits new opportunities. The goal of this paper is thus to present three emerging technologies (Vertical Nanowire Field Effect Transistors, Ferroelectric Transistors, and Memristors), how to use them to implement logic gates, and the main challenges and issues for the logic synthesis.
Czech name
—
Czech description
—

Project
<a href="/en/project/EF16_019%2F0000765" target="_blank" >EF16_019/0000765: Research Center for Informatics</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2021
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of 24th International Symposium on Design and Diagnostics of Electronic Circuits and Systems
ISBN
978-1-6654-3595-6
ISSN
—
e-ISSN
—
Number of pages
6
Pages from-to
93-98
Publisher name
IEEE
Place of publication
Piscataway (New Jersey)
Event location
Vienna
Event date
Apr 7, 2021
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000672620200018

Similar results(10)