A Survey of Non-conventional Techniques for Low-voltage Low-power Analog Circuit Design

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F13%3APU103169" target="_blank" >RIV/00216305:26220/13:PU103169 - isvavai.cz</a>

Výsledek na webu

<a href="http://www.radioeng.cz/fulltexts/2013/13_02_0415_0427.pdf" target="_blank" >http://www.radioeng.cz/fulltexts/2013/13_02_0415_0427.pdf</a>

DOI - Digital Object Identifier

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Jazyk výsledku

angličtina

Název v původním jazyce

A Survey of Non-conventional Techniques for Low-voltage Low-power Analog Circuit Design

Popis výsledku v původním jazyce

Designing integrated circuits able to work under low-voltage (LV) low-power (LP) condition is currently undergoing a very considerable boom. Reducing voltage supply and power consumption of integrated circuits is crucial factor since in general it ensures the device reliability, prevents overheating of the circuits and in particular prolongs the operation period for battery powered devices. Recently, non-conventional techniques i.e. bulk-driven (BD), floating-gate (FG) and quasi-floating-gate (QFG) techniques have been proposed as powerful ways to reduce the design complexity and push the voltage supply towards threshold voltage of the MOS transistors (MOST). Therefore, this paper presents the operation principle, the advantages and disadvantages of each of these techniques, enabling circuit designers to choose the proper design technique based on application requirements. As an example of application three operational transconductance amplifiers (OTA) base on these non-conventional techniques are presented, the voltage supply is only +-0.4 V and the power consumption is 23.5 uW. PSpice simulation results using the 0.18 um CMOS technology from TSMC are included to verify the design functionality and correspondence with theory.

Název v anglickém jazyce

A Survey of Non-conventional Techniques for Low-voltage Low-power Analog Circuit Design

Popis výsledku anglicky

Designing integrated circuits able to work under low-voltage (LV) low-power (LP) condition is currently undergoing a very considerable boom. Reducing voltage supply and power consumption of integrated circuits is crucial factor since in general it ensures the device reliability, prevents overheating of the circuits and in particular prolongs the operation period for battery powered devices. Recently, non-conventional techniques i.e. bulk-driven (BD), floating-gate (FG) and quasi-floating-gate (QFG) techniques have been proposed as powerful ways to reduce the design complexity and push the voltage supply towards threshold voltage of the MOS transistors (MOST). Therefore, this paper presents the operation principle, the advantages and disadvantages of each of these techniques, enabling circuit designers to choose the proper design technique based on application requirements. As an example of application three operational transconductance amplifiers (OTA) base on these non-conventional techniques are presented, the voltage supply is only +-0.4 V and the power consumption is 23.5 uW. PSpice simulation results using the 0.18 um CMOS technology from TSMC are included to verify the design functionality and correspondence with theory.

Druh

J_x - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)

CEP obor

JA - Elektronika a optoelektronika, elektrotechnika

OECD FORD obor

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Projekt

Výsledek vznikl pri realizaci vícero projektů. Více informací v záložce Projekty.

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2013

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

Radioengineering

ISSN

1210-2512

e-ISSN

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Svazek periodika

2013 (22)

Číslo periodika v rámci svazku

2, IF: 0.6

Stát vydavatele periodika

CZ - Česká republika

Počet stran výsledku

13

Strana od-do

415-427

Kód UT WoS článku

000321319100002

EID výsledku v databázi Scopus

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