Bulk-driven floating-gate and bulk-driven quasi-floating-gate techniques for low-voltage low-power analog circuits design

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F14%3APU104661" target="_blank" >RIV/00216305:26220/14:PU104661 - isvavai.cz</a>

Výsledek na webu

<a href="http://dx.doi.org/10.1016/j.aeue.2013.08.019" target="_blank" >http://dx.doi.org/10.1016/j.aeue.2013.08.019</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1016/j.aeue.2013.08.019" target="_blank" >10.1016/j.aeue.2013.08.019</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Bulk-driven floating-gate and bulk-driven quasi-floating-gate techniques for low-voltage low-power analog circuits design

Popis výsledku v původním jazyce

In this paper, novel non-conventional techniques, named by the author of this paper "bulk-driven floating-gate (BD-FG)" MOS transistor (MOST) and "bulk-driven quasi-floating-gate (BD-QFG) MOST" for low-voltage (LV) low-power (LP) analog circuit design are presented. These novel techniques appear as a good solution to merge the advantages of floating-gate (FG) and quasi-floating-gate (QFG) with the advantages of bulk-driven (BD) technique and suppress their disadvantages. Consequently, the transconductance and transient frequency of BD-FG and BD-QFG MOSTs approach the conventional gate driven (GD) MOST values. Furthermore, a novel LV LP class AB second generation current conveyor based on BD-FG MOST is presented in this paper as an example. The supply voltage is only +-0.4 V with a rail-to-rail voltage swing capability and total power consumption of mere 10 uW. PSpice simulation results using the 0.18 um P-well CMOS technology are included to confirm the attractive properties of these new techniques.

Název v anglickém jazyce

Bulk-driven floating-gate and bulk-driven quasi-floating-gate techniques for low-voltage low-power analog circuits design

Popis výsledku anglicky

In this paper, novel non-conventional techniques, named by the author of this paper "bulk-driven floating-gate (BD-FG)" MOS transistor (MOST) and "bulk-driven quasi-floating-gate (BD-QFG) MOST" for low-voltage (LV) low-power (LP) analog circuit design are presented. These novel techniques appear as a good solution to merge the advantages of floating-gate (FG) and quasi-floating-gate (QFG) with the advantages of bulk-driven (BD) technique and suppress their disadvantages. Consequently, the transconductance and transient frequency of BD-FG and BD-QFG MOSTs approach the conventional gate driven (GD) MOST values. Furthermore, a novel LV LP class AB second generation current conveyor based on BD-FG MOST is presented in this paper as an example. The supply voltage is only +-0.4 V with a rail-to-rail voltage swing capability and total power consumption of mere 10 uW. PSpice simulation results using the 0.18 um P-well CMOS technology are included to confirm the attractive properties of these new techniques.

Druh

J_imp - Článek v periodiku v databázi Web of Science

CEP obor

—

OECD FORD obor

20201 - Electrical and electronic engineering

Projekt

Výsledek vznikl pri realizaci vícero projektů. Více informací v záložce Projekty.

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2014

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

AEU - International Journal of Electronics and Communications

ISSN

1434-8411

e-ISSN

1618-0399

Svazek periodika

2014 (68)

Číslo periodika v rámci svazku

1, IF: 0.696

Stát vydavatele periodika

DE - Spolková republika Německo

Počet stran výsledku

9

Strana od-do

64-72

Kód UT WoS článku

000328795600010

EID výsledku v databázi Scopus

2-s2.0-84887471881