Multiple-input bulk-driven quasi-floating-gate MOS transistor for low-voltage low-power integrated circuits

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21460%2F19%3A00340711" target="_blank" >RIV/68407700:21460/19:00340711 - isvavai.cz</a>

Nalezeny alternativní kódy

RIV/00216305:26220/19:PU130174

Výsledek na webu

<a href="https://doi.org/10.1016/j.aeue.2018.12.023" target="_blank" >https://doi.org/10.1016/j.aeue.2018.12.023</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1016/j.aeue.2018.12.023" target="_blank" >10.1016/j.aeue.2018.12.023</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Multiple-input bulk-driven quasi-floating-gate MOS transistor for low-voltage low-power integrated circuits

Popis výsledku v původním jazyce

This brief presents the first experimental results of the multiple-input bulk-driven quasi-floating-gate (MI-BD-QFG) MOS transistor (MOST) which is suitable for low-voltage (LV) low-power (LP) integrated circuits design. The MI-BD-QFG MOST is an extension to the principle of the bulk-driven quasifloating-gate (BD-QFG) MOST. However, unlike the BD-QFG the MI-BD-QFG MOST offers multiple-input that simplifies specific CMOS topologies and reduce their power consumption. To confirm the advantages of the MI-BD-QFG MOST a Differential Difference Current Conveyor (DDCC) with very simple CMOS structure has been designed and fabricated in a standard n-well 0.18 mu in CMOS process from TSMC with total chip area 350 mu m x 78 mu m. The fabricated circuit uses a 0.5 V power supply, consumes 1.7 mu W power and offers near rail-to-rail input common mode range. (C) 2018 Elsevier GmbH. All rights reserved.

Název v anglickém jazyce

Multiple-input bulk-driven quasi-floating-gate MOS transistor for low-voltage low-power integrated circuits

Popis výsledku anglicky

This brief presents the first experimental results of the multiple-input bulk-driven quasi-floating-gate (MI-BD-QFG) MOS transistor (MOST) which is suitable for low-voltage (LV) low-power (LP) integrated circuits design. The MI-BD-QFG MOST is an extension to the principle of the bulk-driven quasifloating-gate (BD-QFG) MOST. However, unlike the BD-QFG the MI-BD-QFG MOST offers multiple-input that simplifies specific CMOS topologies and reduce their power consumption. To confirm the advantages of the MI-BD-QFG MOST a Differential Difference Current Conveyor (DDCC) with very simple CMOS structure has been designed and fabricated in a standard n-well 0.18 mu in CMOS process from TSMC with total chip area 350 mu m x 78 mu m. The fabricated circuit uses a 0.5 V power supply, consumes 1.7 mu W power and offers near rail-to-rail input common mode range. (C) 2018 Elsevier GmbH. All rights reserved.

Druh

J_imp - Článek v periodiku v databázi Web of Science

CEP obor

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OECD FORD obor

20201 - Electrical and electronic engineering

Projekt

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Návaznosti

I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Rok uplatnění

2019

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

AEU-International Journal of Electronics and Communications

ISSN

1434-8411

e-ISSN

1618-0399

Svazek periodika

100

Číslo periodika v rámci svazku

2019

Stát vydavatele periodika

DE - Spolková republika Německo

Počet stran výsledku

7

Strana od-do

32-38

Kód UT WoS článku

000460368700005

EID výsledku v databázi Scopus

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