Efficient Reverse Converter and Residue Comparator Based on a Novel Algorithm for Reverse Conversion

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F13%3APU104183" target="_blank" >RIV/00216305:26220/13:PU104183 - isvavai.cz</a>

Výsledek na webu

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DOI - Digital Object Identifier

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Jazyk výsledku

angličtina

Název v původním jazyce

Efficient Reverse Converter and Residue Comparator Based on a Novel Algorithm for Reverse Conversion

Popis výsledku v původním jazyce

This paper presents a novel algorithm for performing reverse conversion in the residue number system (RNS) based on the moduli set {2n ? 1, 2n, 2n + 1}. The majority of the papers regarding the reverse converters are principally based on one of the following algorithms; the mixed radix conversion (MRC), the Chinese remainder theorem (CRT) and the new Chinese remainder theorems (new CRTs). The proposed algorithm is simpler and does not require multiplicative inverses neither performing multiplication operations. Moreover, a residue to binary converter and a residue comparator based on the proposed algorithm are presented too. The proposed components provide attractive characteristics in systems with medium to large dynamic ranges. They can operate at considerably higher frequencies than their counterparts can. The proposed reverse converter and residue comparator are implemented on Spartan-3E FPGA. The implementation results and comparisons proved the efficiency and superiority of the p

Název v anglickém jazyce

Efficient Reverse Converter and Residue Comparator Based on a Novel Algorithm for Reverse Conversion

Popis výsledku anglicky

This paper presents a novel algorithm for performing reverse conversion in the residue number system (RNS) based on the moduli set {2n ? 1, 2n, 2n + 1}. The majority of the papers regarding the reverse converters are principally based on one of the following algorithms; the mixed radix conversion (MRC), the Chinese remainder theorem (CRT) and the new Chinese remainder theorems (new CRTs). The proposed algorithm is simpler and does not require multiplicative inverses neither performing multiplication operations. Moreover, a residue to binary converter and a residue comparator based on the proposed algorithm are presented too. The proposed components provide attractive characteristics in systems with medium to large dynamic ranges. They can operate at considerably higher frequencies than their counterparts can. The proposed reverse converter and residue comparator are implemented on Spartan-3E FPGA. The implementation results and comparisons proved the efficiency and superiority of the p

Druh

J_x - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)

CEP obor

JA - Elektronika a optoelektronika, elektrotechnika

OECD FORD obor

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Projekt

<a href="/cs/project/FR-TI3%2F485" target="_blank" >FR-TI3/485: Sledování stavu stavebních konstrukcí pomocí elektricky vodivých prvků s modifikovanou cementovou matricí</a><br>

Návaznosti

S - Specificky vyzkum na vysokych skolach

Rok uplatnění

2013

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

International Journal of Computer Science Issues

ISSN

1694-0784

e-ISSN

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Svazek periodika

10

Číslo periodika v rámci svazku

4

Stát vydavatele periodika

MU - Mauricijská republika

Počet stran výsledku

7

Strana od-do

23-30

Kód UT WoS článku

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EID výsledku v databázi Scopus

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