Low-voltage low-power second-generation current conveyor and its applications

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F18%3APU127867" target="_blank" >RIV/00216305:26220/18:PU127867 - isvavai.cz</a>

Výsledek na webu

<a href="http://dx.doi.org/10.17654/EC018040489" target="_blank" >http://dx.doi.org/10.17654/EC018040489</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.17654/EC018040489" target="_blank" >10.17654/EC018040489</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Low-voltage low-power second-generation current conveyor and its applications

Popis výsledku v původním jazyce

This paper presents a new low-voltage low-power second-generation current conveyor that can be applied to ultra-low voltage signal processing. The proposed circuit uses the supply voltage of a 0.5-V and offers a rail-to-rail input voltage swing which is possible using bulk-driven MOS transistor technique. The proposed circuit is used to realize Tow-Thomas biquad circuit and third-order Chebysheb low-pass filter to confirm the operation of the proposed current conveyor. The performance and workability of the proposed circuit and its applications can be demonstrated through simulations using PSPICE simulators with TSMC 0.18 μm n-well CMOS technology. The simulation result shows that the power consumption of the proposed current conveyor is 4.7 μW.

Název v anglickém jazyce

Low-voltage low-power second-generation current conveyor and its applications

Popis výsledku anglicky

This paper presents a new low-voltage low-power second-generation current conveyor that can be applied to ultra-low voltage signal processing. The proposed circuit uses the supply voltage of a 0.5-V and offers a rail-to-rail input voltage swing which is possible using bulk-driven MOS transistor technique. The proposed circuit is used to realize Tow-Thomas biquad circuit and third-order Chebysheb low-pass filter to confirm the operation of the proposed current conveyor. The performance and workability of the proposed circuit and its applications can be demonstrated through simulations using PSPICE simulators with TSMC 0.18 μm n-well CMOS technology. The simulation result shows that the power consumption of the proposed current conveyor is 4.7 μW.

Druh

J_ost - Ostatní články v recenzovaných periodicích

CEP obor

—

OECD FORD obor

20201 - Electrical and electronic engineering

Projekt

—

Návaznosti

S - Specificky vyzkum na vysokych skolach

Rok uplatnění

2018

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

Far East Journal of Electronics and Communications

ISSN

0973-7006

e-ISSN

—

Svazek periodika

18

Číslo periodika v rámci svazku

4

Stát vydavatele periodika

IN - Indická republika

Počet stran výsledku

18

Strana od-do

489-506

Kód UT WoS článku

—

EID výsledku v databázi Scopus

—