Synthesis Methodology of Polymorphic Circuits Using Polymorphic NAND/NOR Gates
Identifikátory výsledku
Kód výsledku v IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F15%3APU116972" target="_blank" >RIV/00216305:26230/15:PU116972 - isvavai.cz</a>
Výsledek na webu
<a href="http://dx.doi.org/10.1109/UKSim.2015.82" target="_blank" >http://dx.doi.org/10.1109/UKSim.2015.82</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/UKSim.2015.82" target="_blank" >10.1109/UKSim.2015.82</a>
Alternativní jazyky
Jazyk výsledku
angličtina
Název v původním jazyce
Synthesis Methodology of Polymorphic Circuits Using Polymorphic NAND/NOR Gates
Popis výsledku v původním jazyce
In this paper, a novel approach dealing with the issues of multifunctional (polymorphic) logic circuits synthesis is presented. Crucial notion behind the polymorphic concept resides in the fact that such kind of circuit is able to perform more than one logic function, while the underlying structure keeps its arrangement untouched. The outlined behaviour is established by means of utilizing special multifunctional components (gates) during circuit design phase, where the individual connections among them remains unchanged (no reconfiguration takes place). The exact function, which the circuit is purposely executing at a given moment, is determined by the actual operating environment (e.g. supply voltage, temperature or a special signal). The proposed synthesis method is based on a formal Boolean representation of corresponding functions. Its main advantage can be recognized in strictly rigid and algorithmic notation with the employment of minimization techniques, which is in a direct contrast to competitive solutions, predominantly based on heuristic approaches.
Název v anglickém jazyce
Synthesis Methodology of Polymorphic Circuits Using Polymorphic NAND/NOR Gates
Popis výsledku anglicky
In this paper, a novel approach dealing with the issues of multifunctional (polymorphic) logic circuits synthesis is presented. Crucial notion behind the polymorphic concept resides in the fact that such kind of circuit is able to perform more than one logic function, while the underlying structure keeps its arrangement untouched. The outlined behaviour is established by means of utilizing special multifunctional components (gates) during circuit design phase, where the individual connections among them remains unchanged (no reconfiguration takes place). The exact function, which the circuit is purposely executing at a given moment, is determined by the actual operating environment (e.g. supply voltage, temperature or a special signal). The proposed synthesis method is based on a formal Boolean representation of corresponding functions. Its main advantage can be recognized in strictly rigid and algorithmic notation with the employment of minimization techniques, which is in a direct contrast to competitive solutions, predominantly based on heuristic approaches.
Klasifikace
Druh
D - Stať ve sborníku
CEP obor
—
OECD FORD obor
20206 - Computer hardware and architecture
Návaznosti výsledku
Projekt
Výsledek vznikl pri realizaci vícero projektů. Více informací v záložce Projekty.
Návaznosti
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Ostatní
Rok uplatnění
2015
Kód důvěrnosti údajů
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Údaje specifické pro druh výsledku
Název statě ve sborníku
Proceedings on UKSim-AMSS 17th International Conference on Computer Modelling ans Simulation
ISBN
978-1-4799-8713-9
ISSN
—
e-ISSN
—
Počet stran výsledku
6
Strana od-do
612-617
Název nakladatele
IEEE Computer Society
Místo vydání
Cambridge
Místo konání akce
Cambridge
Datum konání akce
25. 3. 2015
Typ akce podle státní příslušnosti
WRD - Celosvětová akce
Kód UT WoS článku
000411860000069