A Framework for Optimizing a Processor to Selected Application

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F18%3APU130711" target="_blank" >RIV/00216305:26230/18:PU130711 - isvavai.cz</a>

Výsledek na webu

<a href="https://www.fit.vut.cz/research/publication/11689/" target="_blank" >https://www.fit.vut.cz/research/publication/11689/</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1109/EWDTS.2018.8524733" target="_blank" >10.1109/EWDTS.2018.8524733</a>

Jazyk výsledku

angličtina

Název v původním jazyce

A Framework for Optimizing a Processor to Selected Application

Popis výsledku v původním jazyce

A processor plays the main role in almost every electronics system. The use of a general purpose processor may not be profitable for a specific application, because the processor is designed for a wide set of applications. Application Specific Instruction-set Processors (ASIPs) are today applied in specific cases, where one application or a certain group of applications is performed. This paper focuses on automatic optimization of an ASIP for a given application through checking its possible configurations of key parameters (number of registers, size of caches, instruction set modification, etc.). The paper also presents designed framework which is able to optimize the given application in terms of speed, area or power consumption. The framework allows to use various optimization methods. For the processor modification, the Codasip Studio tool is used. It allows to generate all tools needed for compilation, simulation, and hardware mapping which are needed in process of ASIP design. The experiments are carried on RISC-V (Reduced Instruction Set Computing) processor described in Codasip Studio.

Název v anglickém jazyce

A Framework for Optimizing a Processor to Selected Application

Popis výsledku anglicky

A processor plays the main role in almost every electronics system. The use of a general purpose processor may not be profitable for a specific application, because the processor is designed for a wide set of applications. Application Specific Instruction-set Processors (ASIPs) are today applied in specific cases, where one application or a certain group of applications is performed. This paper focuses on automatic optimization of an ASIP for a given application through checking its possible configurations of key parameters (number of registers, size of caches, instruction set modification, etc.). The paper also presents designed framework which is able to optimize the given application in terms of speed, area or power consumption. The framework allows to use various optimization methods. For the processor modification, the Codasip Studio tool is used. It allows to generate all tools needed for compilation, simulation, and hardware mapping which are needed in process of ASIP design. The experiments are carried on RISC-V (Reduced Instruction Set Computing) processor described in Codasip Studio.

Druh

D - Stať ve sborníku

CEP obor

—

OECD FORD obor

20206 - Computer hardware and architecture

Projekt

<a href="/cs/project/LQ1602" target="_blank" >LQ1602: IT4Innovations excellence in science</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2018

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

Proceedings of IEEE East-West Design & Test Symposium

ISBN

978-1-5386-5710-2

ISSN

—

e-ISSN

—

Počet stran výsledku

11

Strana od-do

564-574

Název nakladatele

IEEE Computer Society

Místo vydání

Kazan

Místo konání akce

Kazan, Rusko

Datum konání akce

14. 9. 2018

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

000517795800076