Design and verification of FPGA-based real-time HIL simulator of induction motor drive

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F49777513%3A23220%2F18%3A43932330" target="_blank" >RIV/49777513:23220/18:43932330 - isvavai.cz</a>

Výsledek na webu

<a href="https://link.springer.com/chapter/10.1007/978-3-319-65960-2_59" target="_blank" >https://link.springer.com/chapter/10.1007/978-3-319-65960-2_59</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1007/978-3-319-65960-2_59" target="_blank" >10.1007/978-3-319-65960-2_59</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Design and verification of FPGA-based real-time HIL simulator of induction motor drive

Popis výsledku v původním jazyce

The control algorithms especially their software implementation is essential for safety and reliability of real-time embedded systems. The paper presents hardware in the loop testing (HIL) method based on a field programmable gate array (FPGA) real time model of induction motor (IM) drive. The HIL is popular method for rapid development of control algorithms and their testing. The HIL models could be operated in the most of possible error states and critical conditions which are hard to achieve in a real systems (rare states, failures etc.). The important part of HIL systems design is their verification. The HIL models must be verified by comparison with real systems and tuned to the real system parameters to achieve the best possible precision in the whole operating conditions. This paper describes HIL model of IM drive containing squirrel-cage IM model and the three phase inverter model with dead-times and voltage drops. The HIL model is verified by real-time co-simulation with the real IM drive.

Název v anglickém jazyce

Design and verification of FPGA-based real-time HIL simulator of induction motor drive

Popis výsledku anglicky

The control algorithms especially their software implementation is essential for safety and reliability of real-time embedded systems. The paper presents hardware in the loop testing (HIL) method based on a field programmable gate array (FPGA) real time model of induction motor (IM) drive. The HIL is popular method for rapid development of control algorithms and their testing. The HIL models could be operated in the most of possible error states and critical conditions which are hard to achieve in a real systems (rare states, failures etc.). The important part of HIL systems design is their verification. The HIL models must be verified by comparison with real systems and tuned to the real system parameters to achieve the best possible precision in the whole operating conditions. This paper describes HIL model of IM drive containing squirrel-cage IM model and the three phase inverter model with dead-times and voltage drops. The HIL model is verified by real-time co-simulation with the real IM drive.

Druh

D - Stať ve sborníku

CEP obor

—

OECD FORD obor

20201 - Electrical and electronic engineering

Projekt

<a href="/cs/project/LO1607" target="_blank" >LO1607: RICE – Nové technologie a koncepce pro inteligentní průmyslové systémy</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach

Rok uplatnění

2018

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

Mechatronics 2017 : Recent Technological and Scientific Advances (Advances in Intelligent Systems and Computing; Vol. 644)

ISBN

978-3-319-65959-6

ISSN

2194-5357

e-ISSN

2194-5365

Počet stran výsledku

9

Strana od-do

475-483

Název nakladatele

Springer

Místo vydání

Cham

Místo konání akce

Brno, Czech Republic

Datum konání akce

6. 9. 2017

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

000554435500059