A Plugin-Based Architecture for Onboard Data Processing in Katherine Readout Systems for Timepix Detectors

Kód výsledku v IS VaVaI

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Výsledek na webu

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DOI - Digital Object Identifier

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Jazyk výsledku

angličtina

Název v původním jazyce

A Plugin-Based Architecture for Onboard Data Processing in Katherine Readout Systems for Timepix Detectors

Popis výsledku v původním jazyce

ecently, the Katherine readout for the new Timepix4 chip has been finished and introduced to the Medipix scientific community [1]. Timepix4 [2] represents another leap forward in the capabilities of Timepix-class detectors. It features a resolution of 512×448 pixels, superior time binning (195 ps), and supports extremely high hit rates—up to 2.5 Ghits/s per chip. All Katherine devices implement on-the-fly raw data decoding, which minimizes the need for data processing in the control software. However, since their architecture is based on SoC FPGA devices, there remains an opportunity to utilize this computational power in even more effective ways. For this reason, we present a software plugin architecture designed for Katherine readout devices, enabling onboard data processing directly on the device’s CPU. The goal of this work is to provide users with a C++ framework that supports the development of custom plugins or the use of pre-defined ones. The presented approach makes it possible to implement data-processing routines—previously handled by theacquisition software—directl in the hardware of the readout system. This capability can be used, for example, for data clustering, noisy pixel detection, or real-time processing for imaging applications.

Název v anglickém jazyce

A Plugin-Based Architecture for Onboard Data Processing in Katherine Readout Systems for Timepix Detectors

Popis výsledku anglicky

ecently, the Katherine readout for the new Timepix4 chip has been finished and introduced to the Medipix scientific community [1]. Timepix4 [2] represents another leap forward in the capabilities of Timepix-class detectors. It features a resolution of 512×448 pixels, superior time binning (195 ps), and supports extremely high hit rates—up to 2.5 Ghits/s per chip. All Katherine devices implement on-the-fly raw data decoding, which minimizes the need for data processing in the control software. However, since their architecture is based on SoC FPGA devices, there remains an opportunity to utilize this computational power in even more effective ways. For this reason, we present a software plugin architecture designed for Katherine readout devices, enabling onboard data processing directly on the device’s CPU. The goal of this work is to provide users with a C++ framework that supports the development of custom plugins or the use of pre-defined ones. The presented approach makes it possible to implement data-processing routines—previously handled by theacquisition software—directl in the hardware of the readout system. This capability can be used, for example, for data clustering, noisy pixel detection, or real-time processing for imaging applications.

Druh

O - Ostatní výsledky

CEP obor

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OECD FORD obor

20201 - Electrical and electronic engineering

Projekt

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Návaznosti

S - Specificky vyzkum na vysokych skolach

Rok uplatnění

2025

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů