Design adaptation of an electronically tunable oscillator using a low performance linearized CMOS operational transconductance amplifier

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F60162694%3AG43__%2F26%3A00565911" target="_blank" >RIV/60162694:G43__/26:00565911 - isvavai.cz</a>

Nalezeny alternativní kódy

RIV/00216305:26220/26:0198899

Výsledek na webu

<a href="https://www.sciencedirect.com/science/article/pii/S2215098625002332" target="_blank" >https://www.sciencedirect.com/science/article/pii/S2215098625002332</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1016/j.jestch.2025.102178" target="_blank" >10.1016/j.jestch.2025.102178</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Design adaptation of an electronically tunable oscillator using a low performance linearized CMOS operational transconductance amplifier

Popis výsledku v původním jazyce

This paper presents the implementation of commercially available CMOS devices with unfavorable properties, such as low output resistance, in an application designed to mitigate these limitations. By employing a specific topology and considering key design parameters, the proposed approach minimizes the adverse effects of low output resistance. This design focuses on a linearized operational transconductance amplifier (OTA) based on CMOS transistors, featuring with very low output resistance. This OTA is further integrated into an LC oscillator, where the associated disadvantages are suppressed through a specialized topology and careful selection of parameter values that are unaffected by the low OTA output resistance. The operational verification targets a frequency range of several hundred kHz and a linearly processed voltage range of several hundred mV. The linearized OTA-based low-gain amplifier/attenuator offers a linearity error within -7% (+/- 500 mV). The proposed OTA implementation in the oscillator introduces highly simplified method for adjusting the oscillation condition using a single grounded element while minimizing the adverse effects of low output resistance of OTA. Additionally, the tunability of the oscillator using varactor diodes achieving a range from 120 kHz to 273 kHz for a voltage varying from 0 V to 5 V.

Název v anglickém jazyce

Design adaptation of an electronically tunable oscillator using a low performance linearized CMOS operational transconductance amplifier

Popis výsledku anglicky

This paper presents the implementation of commercially available CMOS devices with unfavorable properties, such as low output resistance, in an application designed to mitigate these limitations. By employing a specific topology and considering key design parameters, the proposed approach minimizes the adverse effects of low output resistance. This design focuses on a linearized operational transconductance amplifier (OTA) based on CMOS transistors, featuring with very low output resistance. This OTA is further integrated into an LC oscillator, where the associated disadvantages are suppressed through a specialized topology and careful selection of parameter values that are unaffected by the low OTA output resistance. The operational verification targets a frequency range of several hundred kHz and a linearly processed voltage range of several hundred mV. The linearized OTA-based low-gain amplifier/attenuator offers a linearity error within -7% (+/- 500 mV). The proposed OTA implementation in the oscillator introduces highly simplified method for adjusting the oscillation condition using a single grounded element while minimizing the adverse effects of low output resistance of OTA. Additionally, the tunability of the oscillator using varactor diodes achieving a range from 120 kHz to 273 kHz for a voltage varying from 0 V to 5 V.

Druh

J_imp - Článek v periodiku v databázi Web of Science

CEP obor

—

OECD FORD obor

21100 - Other engineering and technologies

Projekt

—

Návaznosti

I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Rok uplatnění

2025

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

Engineering Science and Technology, an International Journal

ISSN

2215-0986

e-ISSN

—

Svazek periodika

71

Číslo periodika v rámci svazku

November 2025

Stát vydavatele periodika

NL - Nizozemsko

Počet stran výsledku

10

Strana od-do

102178

Kód UT WoS článku

001572425000001

EID výsledku v databázi Scopus

2-s2.0-105015354715