Analysis and Design Procedure of LVLP Sub-bandgap Reference: Development and Results

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F11%3A00181274" target="_blank" >RIV/68407700:21230/11:00181274 - isvavai.cz</a>

Výsledek na webu

<a href="http://www.radioeng.cz/fulltexts/2011/11_01_239_244.pdf" target="_blank" >http://www.radioeng.cz/fulltexts/2011/11_01_239_244.pdf</a>

DOI - Digital Object Identifier

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Jazyk výsledku

angličtina

Název v původním jazyce

Analysis and Design Procedure of LVLP Sub-bandgap Reference: Development and Results

Popis výsledku v původním jazyce

This work presents an thorough analysis and design of a low-voltage low-power voltage reference circuit with sub-bandgap output voltage. The outcome of the analysis and the resulting design rules are universal and it is supposed to be general and suitable for similar topologies with just minor modifications. The general analysis is followed by a selection of specific topology. The given topology is analyzed for particular parameters which are standard industrial circuit specifications. These parametersare mathematically expressed, some are simplified and equivalent circuits are used. The analysis and proposed design procedure focuses mainly on versatility of the IP block. The features of the circuit suit to low-voltage low-power design with less than10?A supply current draw at 1.3V supply voltage.

Název v anglickém jazyce

Analysis and Design Procedure of LVLP Sub-bandgap Reference: Development and Results

Popis výsledku anglicky

This work presents an thorough analysis and design of a low-voltage low-power voltage reference circuit with sub-bandgap output voltage. The outcome of the analysis and the resulting design rules are universal and it is supposed to be general and suitable for similar topologies with just minor modifications. The general analysis is followed by a selection of specific topology. The given topology is analyzed for particular parameters which are standard industrial circuit specifications. These parametersare mathematically expressed, some are simplified and equivalent circuits are used. The analysis and proposed design procedure focuses mainly on versatility of the IP block. The features of the circuit suit to low-voltage low-power design with less than10?A supply current draw at 1.3V supply voltage.

Druh

J_x - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)

CEP obor

JA - Elektronika a optoelektronika, elektrotechnika

OECD FORD obor

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Projekt

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Návaznosti

S - Specificky vyzkum na vysokych skolach

Rok uplatnění

2011

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

Radioengineering

ISSN

1210-2512

e-ISSN

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Svazek periodika

20

Číslo periodika v rámci svazku

1

Stát vydavatele periodika

CZ - Česká republika

Počet stran výsledku

6

Strana od-do

239-244

Kód UT WoS článku

000289657400011

EID výsledku v databázi Scopus

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