Hardware/Software Co-design for Real Time Embedded Image Processing: A Case Study
Identifikátory výsledku
Kód výsledku v IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F12%3A00194623" target="_blank" >RIV/68407700:21230/12:00194623 - isvavai.cz</a>
Výsledek na webu
<a href="http://www.springerlink.com/content/p81630266123q2tu/" target="_blank" >http://www.springerlink.com/content/p81630266123q2tu/</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1007/978-3-642-33275-3_74" target="_blank" >10.1007/978-3-642-33275-3_74</a>
Alternativní jazyky
Jazyk výsledku
angličtina
Název v původním jazyce
Hardware/Software Co-design for Real Time Embedded Image Processing: A Case Study
Popis výsledku v původním jazyce
Many image processing applications need real time performance, while having restrictions of size, weight and power consumption. These include a wide range of embedded systems from remote sensing applications to mobile phones. FPGA-based solutions are common for these applications, their main drawback being long development time. In this work a co-design methodology for processor-centric embedded systems with hardware acceleration using FPGAs is applied to an image processing method for localization of multiple robots. The goal of the methodology is to achieve a real-time embedded solution using hardware acceleration, but with development time similar to software projects. The final embedded co-designed solution processes 1600x1200 pixel images at a rate of 25 fps, achieving a 12.6x acceleration from the original software solution. This solution runs with a comparable speed as up-to-date PC-based systems, and it is smaller, cheaper and demands less power.
Název v anglickém jazyce
Hardware/Software Co-design for Real Time Embedded Image Processing: A Case Study
Popis výsledku anglicky
Many image processing applications need real time performance, while having restrictions of size, weight and power consumption. These include a wide range of embedded systems from remote sensing applications to mobile phones. FPGA-based solutions are common for these applications, their main drawback being long development time. In this work a co-design methodology for processor-centric embedded systems with hardware acceleration using FPGAs is applied to an image processing method for localization of multiple robots. The goal of the methodology is to achieve a real-time embedded solution using hardware acceleration, but with development time similar to software projects. The final embedded co-designed solution processes 1600x1200 pixel images at a rate of 25 fps, achieving a 12.6x acceleration from the original software solution. This solution runs with a comparable speed as up-to-date PC-based systems, and it is smaller, cheaper and demands less power.
Klasifikace
Druh
D - Stať ve sborníku
CEP obor
JC - Počítačový hardware a software
OECD FORD obor
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Návaznosti výsledku
Projekt
<a href="/cs/project/7AMB12AR022" target="_blank" >7AMB12AR022: Kognitivní autonomní roboty II</a><br>
Návaznosti
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Ostatní
Rok uplatnění
2012
Kód důvěrnosti údajů
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Údaje specifické pro druh výsledku
Název statě ve sborníku
Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications
ISBN
978-3-642-33274-6
ISSN
0302-9743
e-ISSN
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Počet stran výsledku
8
Strana od-do
599-606
Název nakladatele
Springer
Místo vydání
Heidelberg
Místo konání akce
Buenos Aires
Datum konání akce
3. 9. 2012
Typ akce podle státní příslušnosti
WRD - Celosvětová akce
Kód UT WoS článku
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