Accelerating Embedded Image Processing for Real Time: A Case Study

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F13%3A00205377" target="_blank" >RIV/68407700:21230/13:00205377 - isvavai.cz</a>

Výsledek na webu

<a href="http://link.springer.com/content/pdf/10.1007%2Fs11554-013-0353-2.pdf" target="_blank" >http://link.springer.com/content/pdf/10.1007%2Fs11554-013-0353-2.pdf</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1007/s11554-013-0353-2" target="_blank" >10.1007/s11554-013-0353-2</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Accelerating Embedded Image Processing for Real Time: A Case Study

Popis výsledku v původním jazyce

Many image processing applications need real-time performance, while having restrictions of size, weight and power consumption. Common solutions, including hardware/software co-designs, are based on Field Programmable Gate Arrays (FPGAs). Their main drawback is long development time. In this work, a co-design methodology for processor-centric embedded systems with hardware acceleration using FPGAs is proposed. The goal of this methodology is to achieve real-time embedded solutions, using hardware acceleration, but achieving development time similar to that of software projects. Well established methodologies, techniques and languages from the software domain?such as Object-Oriented Paradigm design, Unified Modelling Language, and multithreading programming?are applied; and semiautomatic C-to-HDL translation tools and methods are used and compared. The methodology is applied to achieve an embedded implementation of a global vision algorithm for the localization of multiple robots in an

Název v anglickém jazyce

Accelerating Embedded Image Processing for Real Time: A Case Study

Popis výsledku anglicky

Many image processing applications need real-time performance, while having restrictions of size, weight and power consumption. Common solutions, including hardware/software co-designs, are based on Field Programmable Gate Arrays (FPGAs). Their main drawback is long development time. In this work, a co-design methodology for processor-centric embedded systems with hardware acceleration using FPGAs is proposed. The goal of this methodology is to achieve real-time embedded solutions, using hardware acceleration, but achieving development time similar to that of software projects. Well established methodologies, techniques and languages from the software domain?such as Object-Oriented Paradigm design, Unified Modelling Language, and multithreading programming?are applied; and semiautomatic C-to-HDL translation tools and methods are used and compared. The methodology is applied to achieve an embedded implementation of a global vision algorithm for the localization of multiple robots in an

Druh

J_x - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)

CEP obor

JD - Využití počítačů, robotika a její aplikace

OECD FORD obor

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Projekt

<a href="/cs/project/7AMB12AR022" target="_blank" >7AMB12AR022: Kognitivní autonomní roboty II</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2013

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

Journal of Real-Time Image Processing

ISSN

1861-8200

e-ISSN

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Svazek periodika

2013

Číslo periodika v rámci svazku

1

Stát vydavatele periodika

DE - Spolková republika Německo

Počet stran výsledku

26

Strana od-do

1-26

Kód UT WoS článku

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EID výsledku v databázi Scopus

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