Implementation of a Two-Channel Maximally Decimated Filter Bank using Switched Capacitor Circuits
Identifikátory výsledku
Kód výsledku v IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F13%3A00205960" target="_blank" >RIV/68407700:21230/13:00205960 - isvavai.cz</a>
Výsledek na webu
<a href="http://www.radioeng.cz/fulltexts/2013/13_01_0167_0173.pdf" target="_blank" >http://www.radioeng.cz/fulltexts/2013/13_01_0167_0173.pdf</a>
DOI - Digital Object Identifier
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Alternativní jazyky
Jazyk výsledku
angličtina
Název v původním jazyce
Implementation of a Two-Channel Maximally Decimated Filter Bank using Switched Capacitor Circuits
Popis výsledku v původním jazyce
The aim of this paper is to describe the implementation of a two-channel filter bank (FB) using the switched capacitor (SC) technique considering real properties of operational amplifiers (OpAmps). The design procedure is presented and key recommendations for the implementation are given. The implementation procedure describes the design of two-channel filter bank using an IIR Cauer filter, conversion of IIR into the SC filters and the final implementation of the SC filters. The whole design and an SC circuit implementation is performed by a PraCAn package in Maple. To verify the whole filter bank, resulting real property circuit structures are completely simulated by WinSpice and ELDO simulators. The results confirm that perfect reconstruction conditions can be almost accepted for the filter bank implemented by the SC circuits. The phase response of the SC filter bank is not strictly linear due to the IIR filters. However, the final ripple of a magnitude frequency response in the pass
Název v anglickém jazyce
Implementation of a Two-Channel Maximally Decimated Filter Bank using Switched Capacitor Circuits
Popis výsledku anglicky
The aim of this paper is to describe the implementation of a two-channel filter bank (FB) using the switched capacitor (SC) technique considering real properties of operational amplifiers (OpAmps). The design procedure is presented and key recommendations for the implementation are given. The implementation procedure describes the design of two-channel filter bank using an IIR Cauer filter, conversion of IIR into the SC filters and the final implementation of the SC filters. The whole design and an SC circuit implementation is performed by a PraCAn package in Maple. To verify the whole filter bank, resulting real property circuit structures are completely simulated by WinSpice and ELDO simulators. The results confirm that perfect reconstruction conditions can be almost accepted for the filter bank implemented by the SC circuits. The phase response of the SC filter bank is not strictly linear due to the IIR filters. However, the final ripple of a magnitude frequency response in the pass
Klasifikace
Druh
J<sub>x</sub> - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)
CEP obor
JA - Elektronika a optoelektronika, elektrotechnika
OECD FORD obor
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Návaznosti výsledku
Projekt
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Návaznosti
S - Specificky vyzkum na vysokych skolach
Ostatní
Rok uplatnění
2013
Kód důvěrnosti údajů
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Údaje specifické pro druh výsledku
Název periodika
Radioengineering
ISSN
1210-2512
e-ISSN
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Svazek periodika
22
Číslo periodika v rámci svazku
1
Stát vydavatele periodika
CZ - Česká republika
Počet stran výsledku
7
Strana od-do
167-173
Kód UT WoS článku
000318052400019
EID výsledku v databázi Scopus
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